From 52ca34a1c1778371b6f333c7b3813c343eee1ed7 Mon Sep 17 00:00:00 2001 From: Vladimir Burian Date: Sun, 6 Feb 2011 18:00:10 +0100 Subject: [PATCH] Peripheral logic address redefined as generic. --- omsp_quadcount.vhd | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/omsp_quadcount.vhd b/omsp_quadcount.vhd index 5c84577..43e9750 100644 --- a/omsp_quadcount.vhd +++ b/omsp_quadcount.vhd @@ -4,6 +4,8 @@ use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity omsp_quadcount is + generic ( + ADDR : std_logic_vector (15 downto 0) := X"0150"); port ( mclk : in std_logic; per_addr : in std_logic_vector (7 downto 0); @@ -26,8 +28,11 @@ architecture behavioral of omsp_quadcount is -- When reading whole 32-bit qcount input, first QCNTL has to be loaded, because -- this event causes QCNTH to latch appropriate value of qcount. This procedure -- ensures that correct value is readed. - constant QCNTL : std_logic_vector (15 downto 0) := X"0150"; -- qcount lower word logic address - constant QCNTH : std_logic_vector (15 downto 0) := X"0152"; -- qcount higher word logic address + + -- qcount lower word logic address + constant QCNTL : std_logic_vector (15 downto 0) := ADDR; + -- qcount higher word logic address + constant QCNTH : std_logic_vector (15 downto 0) := ADDR + 2; signal qcntl_sel : boolean; signal qcnth_sel : boolean; -- 2.39.2