VHDL_MAIN     = tb_uart
VHDL_ENTITIES = uart.o \
                tx.o \
                fifo.o \
                baud_gen.o \
                tx_control.o \
                rx.o \
                rx_control.o

STOP_TIME     = 50us


all: $(VHDL_MAIN)

run: $(VHDL_MAIN)
	ghdl -r $< --stop-time=$(STOP_TIME) --vcd=$<.vcd

view: run
	gtkwave $(VHDL_MAIN).vcd

$(VHDL_MAIN): $(VHDL_MAIN).o $(VHDL_ENTITIES)
	ghdl -e -fexplicit --ieee=synopsys $@

%.o: %.vhd
	ghdl -a -fexplicit --ieee=synopsys $<

%.o: ../%.vhd
	ghdl -a -fexplicit --ieee=synopsys $<

clean:
	rm -Rf *.o *.vcd $(VHDL_MAIN) results.txt work-obj93.cf