Removed duplicate signal adc_reset.

[fpga/rpi-motor-control.git] / pmsm-control / rpi_pmsm_control.vhdl

diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl
index 2127d2e93554f937e4c39db52f6a437f94a7aa38..501fd6bcb3d6f8c32d05cab42c06b8ef0c82dbac 100644 (file)
--- a/pmsm-control/rpi_pmsm_control.vhdl
+++ b/pmsm-control/rpi_pmsm_control.vhdl
@@ -154,6 +154,7 @@ architecture behavioral of rpi_pmsm_control is
        component adc_reader is
        port (
                clk: in std_logic;                                      --input clk
+               divided_clk : in std_logic;                             --divided clk - value suitable to sourcing voltage
                adc_reset: in std_logic;
                adc_miso: in std_logic;                                 --spi master in slave out
                adc_channels: out std_logic_vector (35 downto 0);       --consistent data of 3 channels
@@ -166,7 +167,6 @@ architecture behavioral of rpi_pmsm_control is
        end component;
        
        
-       signal adc_reset : std_logic;
        signal adc_channels: std_logic_vector(71 downto 0);
        signal adc_m_count: std_logic_vector(8 downto 0);
 
@@ -290,8 +290,9 @@ begin
        --        while we use +3.3V Vcc     
        adc_reader_map: adc_reader 
        port map(
-               clk =>clk_4M17,
-               adc_reset => adc_reset,
+               clk => gpio_clk,
+               divided_clk => clk_4M17,
+               adc_reset => income_data_valid, --reset at each SPI cycle,TODO: replace with PLL reset
                adc_miso => adc_miso,
                adc_channels => adc_channels,
                adc_sclk => adc_sclk,
@@ -389,9 +390,7 @@ begin
                        --data order schould be: ch2 downto ch0 downto ch1
                        dat_reg(71 downto 0) <= adc_channels(71 downto 0);      --current mesurments
                        spi_miso <= position(31);               --prepare the first bit on SE activation
-                       adc_reset<='0'; --remove reset flag, and wait on its rising edge
                elsif (ce0_old = "01") then --rising edge of SS, we should read the data
-                       adc_reset<='1';
                        pwm_en_p(1 to 3)<=dat_reg(126 downto 124);
                        pwm_en_n(1 to 3)<=dat_reg(123 downto 121);
                        --11 bit pwm TODO: make it generic