From c20f9d683f11fba7e0de9af765eab5d4489c1b83 Mon Sep 17 00:00:00 2001 From: Vladimir Burian Date: Fri, 27 May 2011 07:24:21 +0200 Subject: [PATCH] PWM3 wrapper for 3 PWMs entities. --- pwm3.vhd | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 pwm3.vhd diff --git a/pwm3.vhd b/pwm3.vhd new file mode 100644 index 0000000..88bbf89 --- /dev/null +++ b/pwm3.vhd @@ -0,0 +1,43 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +-------------------------------------------------------------------------------- + +entity pwm3 is + generic ( + PWM_W : integer); + port ( + CLK : in std_logic; + RST : in std_logic; + DAT : in std_logic_vector (PWM_W-1 downto 0); + SEL : in std_logic + WE : in std_logic (2 downto 0); + -- PWM interface + PWM_CNT : in std_logic_vector (PWM_W-1 downto 0) + PWM_CYC : in std_logic; + PWM : out std_logic_vector (2 downto 0)); +end pwm3; + +-------------------------------------------------------------------------------- + +architecture rtl of pwm3 is +begin + + PWM_GEN : for i in 0 to 2 generate + pwm_1 : entity work.pwm + generic map ( + PWM_WIDTH => PWM_W) + port map ( + clk => CLK, + reset => RST, + din => DAT, + sel => SEL, + we => WE (i), + pwm_cnt => PWM_CNT, + pwm_cyc => PWM_CYC, + pwm => PWM (i)); + end generate PWM_GEN; + +end rtl; -- 2.39.2