From 2e862ed6620311ea61bdf17797404da58d3e8ed2 Mon Sep 17 00:00:00 2001
From: Vladimir Burian <buriavl2@fel.cvut.cz>
Date: Fri, 15 Apr 2011 00:27:10 +0200
Subject: [PATCH] README briefly describing MCC

---
 README | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 README

diff --git a/README b/README
new file mode 100644
index 0000000..4c3c0ca
--- /dev/null
+++ b/README
@@ -0,0 +1,54 @@
+//==============================================================================
+// DUAL-PORT RAM MAPPING
+//==============================================================================
+// This memory is an interface to the master MCU. Here is brief memory map
+
+
+// b'0000xxxx' - general registers of 1 axis
+// b'0001ppxx' - registers of all phases (pp - phase number)
+
+// address line width for 1 axis is 5 bits
+
+0x00 : MCC enable flags
+0x01 : IRC
+0x02 : IRC base
+0x03 : IRC max
+0x04 : Angle
+0x05 : Action
+0x06 : reserved (Angle scale)
+0x07 : reserved (Scaled Angle)
+0x08 : reserved (Table base)
+0x09 : reserved (P2 offset)
+0x0A : reserved (P3 offset)
+0x0B : reserved (Table index mask)
+0x0C : reserved (PWM PID - P)
+0x0D : reserved (PWM PID - I)
+0x0E : reserved (PWM PID - D)
+
+// Phase 1
+0x10 : Phase1
+0x11 : PWM1   // PWMx = Phasex * Action
+
+// Phase 2
+0x14 : Phase2
+0x15 : PWM2
+
+// Phase 3
+0x18 : Phase3
+0x19 : PWM3
+
+
+//==============================================================================
+// MOTION-CONTROL-CHAIN COMPONENTS
+//==============================================================================
+// Positions of all units in MCC. Each unit handle specific task. They can be
+// enable/disabled by 0x00 register (MCC enable flags) - bits correspond to
+// indexes in this table.
+
+ 0 : IRC dump
+ 1 : ICR angle decoder
+ 2 : Vector generator
+ 3 : Reference value generator (PWM value)
+ 4 : reserved (PID controller)
+ 5 : PWM dump
+
-- 
2.39.2