Core updates

[fpga/lx-cpu1/tumbl.git] / hw / core_ctrl.vhd

diff --git a/hw/core_ctrl.vhd b/hw/core_ctrl.vhd
index 897a9411607f83118c500993db3b27ca42512e9f..b0e19677c92bb5711f03a08440d2190f97b0b433 100644 (file)
--- a/hw/core_ctrl.vhd
+++ b/hw/core_ctrl.vhd
@@ -20,13 +20,14 @@
 LIBRARY IEEE;
 
 USE IEEE.std_logic_1164.all;
-USE WORK.mbl_Pkg.all;
+USE WORK.mbl_pkg.all;
 
 --------------------------------------------------------------------------------
 ENTITY core_ctrl IS
 --------------------------------------------------------------------------------
        GENERIC
        (
+               IMEM_ABITS_g         : positive := 9;
                COMPATIBILITY_MODE_g : BOOLEAN := FALSE
        );
        PORT
@@ -39,7 +40,7 @@ ENTITY core_ctrl IS
                trace_kick_i    :  IN STD_LOGIC;
                core_clken_o    : OUT STD_LOGIC;
                -- specific fetch i/o
-               imem_addr_o     : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
+               imem_addr_o     : OUT STD_LOGIC_VECTOR ((IMEM_ABITS_g-1) DOWNTO 0);
                imem_clken_o    : OUT STD_LOGIC;
                pc_ctrl_o       : OUT STD_LOGIC;
                -- fetch to decode pipeline registers
@@ -114,7 +115,8 @@ BEGIN
        -- static connections
        reset_s        <= rst_i OR rst_r;
        pc_ctrl_o      <= NOT rst_r;
-       imem_addr_o    <= IF2ID_REG_i.program_counter;
+       -- Addressing is 32-bit, so omit two lowest bytes from PC
+       imem_addr_o    <= IF2ID_REG_i.program_counter((IMEM_ABITS_g+1) DOWNTO 2);
        -- Tracing
        -- Reset_s is 1 when rst_i is one and then gets deactivated
        core_clken_s  <= reset_s OR (((NOT trace_i) AND (NOT exeq_halt_i)) OR trace_kick_i);
@@ -141,13 +143,7 @@ BEGIN
        INT_CTRL_o.int_busy    <= int_busy_r;
 
 regd_proc:
-       PROCESS ( clk_i, rst_i, halt_i, core_clken_s,
-                                               -- complete sensitivity list for synthesizer
-                                               reset_s, MEM2CTRL_i, clken_pipe_s, IF2ID_REG_i,
-                                               flush_ID2EX_s, flush_EX2MEM_s, HAZARD_WRB_i,
-                                               MEM_REG_i, ID2CTRL_i, int_i, MSR_i,
-                                               int_busy_r, IMM_LOCK_i, ID2EX_REG_i, ID2EX_REG_r,
-                                               EX2IF_REG_i, EX2CTRL_REG_i, EX_WRB_i, EX2MEM_REG_i )
+       PROCESS
 
        -- some local procedures
        PROCEDURE lp_rst_IF2ID_REG IS
@@ -234,8 +230,9 @@ regd_proc:
 
        BEGIN
 
-       IF (RISING_EDGE (clk_i) AND (MEM2CTRL_i.clken = '1')) AND halt_i = '0' AND
-                               core_clken_s = '1' THEN
+       WAIT UNTIL clk_i'event AND clk_i = '1';
+
+       IF MEM2CTRL_i.clken = '1' AND halt_i = '0' AND  core_clken_s = '1' THEN
                        rst_r <= rst_i;
 
                IF (reset_s = '1') THEN     -- synchronous reset ...