Add back support for delay slot, but with writing PC+4 when linking and using delay...

[fpga/lx-cpu1/tumbl.git] / hw / exeq.vhd

diff --git a/hw/exeq.vhd b/hw/exeq.vhd
index 03477128f2c0390bfa9720906e908b417c462468..39214226cf201005f2f79b510121bdf5a3cd0926 100644 (file)
--- a/hw/exeq.vhd
+++ b/hw/exeq.vhd
@@ -37,7 +37,10 @@ ENTITY exeq IS
        );
        PORT
        (
+               IF2ID_i      :  IN IF2ID_Type;
+               --
                ID2EX_i      :  IN ID2EX_Type;
+               delayBit_i   :  IN STD_LOGIC;
                GPRF2EX_i    :  IN GPRF2EX_Type;
                EX2IF_o      : OUT EX2IF_Type;
                EX2CTRL_o    : OUT EX2CTRL_Type;
@@ -68,7 +71,7 @@ BEGIN
 
 p_exeq:
        PROCESS (ID2EX_i, GPRF2EX_i, EX_WRB_i, MEM_WRB_i,
-                                               IMM_LOCK_i, MSR_i, HAZARD_WRB_i)
+                                               IF2ID_i, delayBit_i, IMM_LOCK_i, MSR_i, HAZARD_WRB_i)
 
                -- function needed by BSLL (only if USE_BARREL_g = TRUE)
                FUNCTION reverse_bits ( word32 : STD_LOGIC_VECTOR (31 DOWNTO 0) )
@@ -173,11 +176,11 @@ p_exeq:
                IMM32_v := hi16_v & ID2EX_i.IMM16;
 
                CASE ID2EX_i.alu_Op1 IS
-                       WHEN ALU_IN_REGA     =>  in1_v := data_rA_v;
-                       WHEN ALU_IN_NOT_REGA =>  in1_v := NOT data_rA_v;
-                       WHEN ALU_IN_PC       =>  in1_v := ID2EX_i.program_counter;
-                       WHEN ALU_IN_ZERO     =>  in1_v := C_32_ZEROS;
-                       WHEN OTHERS          =>  NULL;
+                       WHEN ALU_IN_REGA      =>  in1_v := data_rA_v;
+                       WHEN ALU_IN_NOT_REGA  =>  in1_v := NOT data_rA_v;
+                       WHEN ALU_IN_PC        =>  in1_v := ID2EX_i.program_counter;
+                       WHEN ALU_IN_ZERO      =>  in1_v := C_32_ZEROS;
+                       WHEN OTHERS           =>  NULL;
                END CASE;
 
                CASE ID2EX_i.alu_Op2 IS
@@ -382,8 +385,13 @@ p_exeq:
                EX2MEM_o.wrix_rD <= ID2EX_i.curr_rD;
                IF (ID2EX_i.branch_Action = BRL) THEN
                        EX2MEM_o.wrb_Action  <= WRB_EX;
-                       EX2MEM_o.exeq_result <= ID2EX_i.program_counter;
-                       EX2MEM_o.data_rD     <= ID2EX_i.program_counter;
+                       IF (COMPATIBILITY_MODE_g = TRUE) OR (delayBit_i = '0') THEN
+                               EX2MEM_o.exeq_result <= ID2EX_i.program_counter;
+                               EX2MEM_o.data_rD     <= ID2EX_i.program_counter;
+                       ELSE
+                               EX2MEM_o.exeq_result <= IF2ID_i.program_counter;
+                               EX2MEM_o.data_rD     <= IF2ID_i.program_counter;
+                       END IF;
                        -- set data_rD_v, although unused, to prevent an inferred latch
                        data_rD_v := GPRF2EX_i.data_rD;
                ELSE