From 48c642924c062902df772ccd7fb9951d68339863 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Fri, 7 Nov 2014 14:30:08 +0100 Subject: [PATCH] RoCoN: PXMC support for new LXPWR data format used by sigma-int rolling ADC. Signed-off-by: Pavel Pisa --- sw/app/rocon/appl_pxmc.c | 71 +++++++++++++++++++++++++++++----------- 1 file changed, 52 insertions(+), 19 deletions(-) diff --git a/sw/app/rocon/appl_pxmc.c b/sw/app/rocon/appl_pxmc.c index 0b9fc1b..b04023a 100644 --- a/sw/app/rocon/appl_pxmc.c +++ b/sw/app/rocon/appl_pxmc.c @@ -48,6 +48,10 @@ int pxmc_ptofs_from_index(pxmc_state_t *mcs, unsigned long irc, #define HAL_ERR_SENSITIVITY 20 #define HAL_ERR_MAX_COUNT 5 +//#define LXPWR_WITH_SIROLADC 1 + +#define LX_MASTER_DATA_OFFS 8 + unsigned pxmc_rocon_pwm_magnitude = 2500; long pxmc_rocon_irc_offset[PXML_MAIN_CNT]; @@ -228,11 +232,13 @@ pxmc_rocon_receiver_chan2reg(unsigned chan) return &pxmc_rocon_receiver_dummy_reg; rec_reg = fpga_lx_master_receiver_base; - #if 0 /* FPGA design version 2 */ - rec_reg += 1 + (chan >> 8) + chan; - #else /* FPGA design version 3 */ - rec_reg += chan + 8; - #endif + + #ifdef LXPWR_WITH_SIROLADC + rec_reg += LX_MASTER_DATA_OFFS + 1 + (chan >> 8) + chan * 2; + #else /*LXPWR_WITH_SIROLADC*/ + rec_reg += LX_MASTER_DATA_OFFS + chan; + #endif /*LXPWR_WITH_SIROLADC*/ + return rec_reg; } @@ -242,14 +248,21 @@ pxmc_rocon_bldc_hal_rd(pxmc_state_t *mcs) unsigned h = 0; volatile uint32_t *rec_reg_a, *rec_reg_b, *rec_reg_c; int chan = mcs->pxms_out_info; + int hal_offs; + + #ifdef LXPWR_WITH_SIROLADC + hal_offs = 1; + #else /*LXPWR_WITH_SIROLADC*/ + hal_offs = 0; + #endif /*LXPWR_WITH_SIROLADC*/ rec_reg_a = pxmc_rocon_receiver_chan2reg(chan + 0); rec_reg_b = pxmc_rocon_receiver_chan2reg(chan + 1); rec_reg_c = pxmc_rocon_receiver_chan2reg(chan + 2); - h = (*rec_reg_a >> 14) & 1; - h |= (*rec_reg_b >> 13) & 2; - h |= (*rec_reg_c >> 12) & 4; + h = (rec_reg_a[hal_offs] >> 14) & 1; + h |= (rec_reg_b[hal_offs] >> 13) & 2; + h |= (rec_reg_c[hal_offs] >> 12) & 4; /* return 3 bits corresponding to the HAL senzor input */ return h; @@ -292,11 +305,13 @@ pxmc_rocon_pwm_chan2reg(unsigned chan) return &pxmc_rocon_pwm_dummy_reg; pwm_reg = fpga_lx_master_transmitter_base; - #if 0 /* FPGA design version 2 */ - pwm_reg += 1 + (chan >> 8) + chan; - #else /* FPGA design version 3 */ - pwm_reg += chan + 8; - #endif + + #ifdef LXPWR_WITH_SIROLADC + pwm_reg += LX_MASTER_DATA_OFFS + 1 + (chan >> 8) + chan; + #else /*LXPWR_WITH_SIROLADC*/ + pwm_reg += LX_MASTER_DATA_OFFS + chan; + #endif /*LXPWR_WITH_SIROLADC*/ + return pwm_reg; } @@ -689,28 +704,46 @@ pxmc_rocon_pwm_dc_out(pxmc_state_t *mcs) return 0; } -/* PWM outputs placed on (PWM1), PWM2, PWM4, PWM6 */ int pxmc_rocon_pwm_master_init(void) { int i; int grp_in = 0; int grp_out = 0; + unsigned word_slot; + #ifdef LXPWR_WITH_SIROLADC + unsigned lxpwr_words = 1 + 8 * 2; + unsigned lxpwr_chips = 2; + #else /*LXPWR_WITH_SIROLADC*/ + unsigned lxpwr_words = 8; + unsigned lxpwr_chips = 2; + #endif /*LXPWR_WITH_SIROLADC*/ *fpga_lx_master_reset = 1; *fpga_lx_master_transmitter_reg = 0; - for (i = 0; i < 8 + 16; i ++) + for (i = 0; i < LX_MASTER_DATA_OFFS + lxpwr_words * lxpwr_chips; i++) fpga_lx_master_receiver_base[i] = 0; - fpga_lx_master_receiver_base[grp_in++] = 0x0808; + word_slot = LX_MASTER_DATA_OFFS; + fpga_lx_master_receiver_base[grp_in++] = (word_slot << 8) | lxpwr_words; fpga_lx_master_receiver_base[grp_in++] = 0x0000; - for (i = 0; i < 8 + 16; i ++) + for (i = 0; i < LX_MASTER_DATA_OFFS + lxpwr_words * lxpwr_chips; i++) fpga_lx_master_transmitter_base[i] = 0; - fpga_lx_master_transmitter_base[grp_out++] = 0x1008; - fpga_lx_master_transmitter_base[grp_out++] = 0x0808; + word_slot = LX_MASTER_DATA_OFFS + lxpwr_words; + fpga_lx_master_transmitter_base[grp_out++] = (word_slot << 8) | lxpwr_words; + #ifdef LXPWR_WITH_SIROLADC + fpga_lx_master_transmitter_base[word_slot] = 0xc100 | lxpwr_words; + #endif /*LXPWR_WITH_SIROLADC*/ + + word_slot = LX_MASTER_DATA_OFFS + 0; + fpga_lx_master_transmitter_base[grp_out++] = (word_slot << 8) | lxpwr_words; + #ifdef LXPWR_WITH_SIROLADC + fpga_lx_master_transmitter_base[word_slot] = 0xc100 | lxpwr_words; + #endif /*LXPWR_WITH_SIROLADC*/ + fpga_lx_master_transmitter_base[grp_out++] = 0x0000; *fpga_lx_master_reset = 0; -- 2.39.2