1 #include <system_def.h>
11 #include <hal_machperiph.h>
19 #include <ul_logreg.h>
21 #include "appl_defs.h"
22 #include "appl_fpga.h"
24 int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
31 snprintf(str, sizeof(str), "memusage maxaddr 0x%08lx\n", (unsigned long)maxaddr);
32 cmd_io_write(cmd_io, str, strlen(str));
37 int cmd_do_test_adc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
39 printf("ADC: %ld %ld %ld %ld %ld\n", (LPC_ADC->DR[0] & 0xFFF0) >> 4,
40 (LPC_ADC->DR[1] & 0xFFF0) >> 4,
41 (LPC_ADC->DR[2] & 0xFFF0) >> 4,
42 (LPC_ADC->DR[3] & 0xFFF0) >> 4,
43 (LPC_ADC->DR[7] & 0xFFF0) >> 4);
47 #ifdef APPL_WITH_DISTORE_EEPROM_USER
48 int cmd_do_test_distore(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
50 appl_distore_user_set_check4change();
54 int cmd_do_test_diload(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
56 appl_distore_user_restore();
59 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
61 int cmd_do_test_loglevel_cb(ul_log_domain_t *domain, void *context)
64 cmd_io_t *cmd_io = (cmd_io_t *)context;
67 snprintf(s, sizeof(s) - 1, "%s (%d)\n\r", domain->name, domain->level);
68 cmd_io_puts(cmd_io, s);
72 int cmd_do_test_loglevel(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
78 if (!line || (si_skspace(&line), !*line))
80 ul_logreg_for_each_domain(cmd_do_test_loglevel_cb, cmd_io);
84 res = ul_log_domain_arg2levels(line);
87 return res >= 0 ? 0 : CMDERR_BADPAR;
90 int cmd_do_spimst_blocking(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
95 int spi_chan = (int)(intptr_t)des->info[0];
96 uint8_t *tx_buff = NULL;
97 uint8_t *rx_buff = NULL;
102 if ((opchar = cmd_opchar_check(cmd_io, des, param)) < 0)
106 return -CMDERR_OPCHAR;
109 spi_chan = *param[1] - '0';
111 spi_drv = spi_find_drv(NULL, spi_chan);
114 return -CMDERR_BADSUF;
120 if (isdigit((int)*p))
122 if (si_long(&p, &addr, 16) < 0)
123 return -CMDERR_BADPAR;
126 if (si_fndsep(&p, "({") < 0)
127 return -CMDERR_BADSEP;
129 if ((res = si_add_to_arr(&p, (void **)&tx_buff, &len, 16, 1, "})")) < 0)
130 return -CMDERR_BADPAR;
132 rx_buff = malloc(len);
137 res = spi_transfer(spi_drv, addr, len, tx_buff, rx_buff);
141 printf("SPI! %02lX ERROR\n", addr);
146 printf("SPI! %02lX ", addr);
149 for (i = 0; i < len; i++)
150 printf("%s%02X", i ? "," : "", tx_buff[i]);
154 for (i = 0; i < len; i++)
155 printf("%s%02X", i ? "," : "", rx_buff[i]);
172 int sdram_access_test(void)
175 unsigned int pattern;
176 size_t ramsz = SDRAM_SIZE;
184 pattern = 0x12abcdef;
186 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
189 pattern = pattern + 0x87654321;
193 printf("SDRAM write %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
198 pattern = 0x12abcdef;
200 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
204 printf("SDRAM error modify at %p (%08x)\n", ptr, *ptr ^ pattern);
209 pattern = pattern + 0x87654321;
213 printf("SDRAM modify %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
218 pattern = 0x12abcdef;
220 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
222 if (*(ptr++) != ~pattern)
224 printf("SDRAM error read at %p (%08x)\n", ptr, *ptr ^ pattern);
228 pattern = pattern + 0x87654321;
232 printf("SDRAM read %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
239 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
245 printf("SDRAM sum %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), pattern);
247 for (blksz = 1; blksz < 256 ; blksz *= 2)
254 for (cnt = ramsz / sizeof(*ptr); cnt; cnt -= blksz)
256 ptr = (typeof(ptr))SDRAM_BASE;
258 //ptr = (typeof(ptr))cmd_do_test_memusage;
259 //ptr = (typeof(ptr))&ptr;
260 for (i = blksz; i--;)
265 printf("SDRAM sum %d blksz %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), (int)blksz, pattern);
271 int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
276 #endif /*SDRAM_BASE*/
278 int cmd_do_testlxpwrrx(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
287 if (si_ulong(&ps, &mode, 0) < 0)
288 return -CMDERR_BADPAR;
291 pxmc_rocon_rx_data_hist_buff = NULL;
292 pxmc_rocon_rx_data_hist_mode = mode;
294 #ifndef PXMC_ROCON_TIMED_BY_RX_DONE
295 pxmc_rocon_rx_done_isr_setup(pxmc_rocon_rx_done_isr);
296 #endif /*PXMC_ROCON_TIMED_BY_RX_DONE*/
297 pxmc_rocon_rx_data_hist_buff_end = (void *)(FPGA_CONFIGURATION_FILE_ADDRESS +
299 ptr = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
304 pxmc_rocon_rx_data_hist_buff = (void *)ptr;
308 int cmd_do_testlxpwrstat(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
310 printf("lxpwrrx period %ld latency %ld max %ld\n",
311 (long)pxmc_rocon_rx_cycle_time, (long)pxmc_rocon_rx_irq_latency,
312 (long)pxmc_rocon_rx_irq_latency_max);
318 int cmd_do_testfncapprox(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
332 long step = 1 << (30-7-18+1 +4);
335 if (si_ulong(&ps, &fnc, 0) < 0)
336 return -CMDERR_BADPAR;
339 if (!strcmp(ps, "all")) {
341 count = 0x80000000UL / step;
346 if (si_ulong(&ps, &val, 0) < 0)
347 return -CMDERR_BADPAR;
350 for (; count--; val += step) {
354 xb = __builtin_clz(x);
360 fpga_fncapprox_base[fnc] = xl;
362 /* dummy read to provide time to function aproximator to proceed computation */
363 res = fpga_fncapprox_base[fnc];
364 res = fpga_fncapprox_base[fnc];
370 yl = (1LL << 62) / xl;
373 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
374 yl = round(sin(xf) * (1UL << 16));
377 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
378 yl = round(cos(xf) * (1UL << 16));
386 if ((diff > 0) && (diff > diff_max))
388 else if ((diff < 0) && (-diff > diff_max))
395 printf("fnc=%ld val=0x%08lx res=0x%08lx ref=0x%08lx diff=%ld max %ld\n",
396 fnc, val, res, (unsigned long)yl, diff, diff_max);
401 int cmd_do_testtumblefw(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
411 pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
413 fpga_tumbl_dmem[0] = 0;
416 if (si_long(&ps, &pwm_d, 0) < 0)
417 return -CMDERR_BADPAR;
420 if (si_ulong(&ps, &pwm_q, 0) < 0)
421 return -CMDERR_BADPAR;
423 irc = fpga_irc[0]->count;
424 ptofs = (int16_t)(mcs->pxms_ptofs - irc) + irc;
426 ptirc = mcs->pxms_ptirc;
427 ull = (1ULL << 32) * mcs->pxms_ptper;
428 ptreci = (ull + ptirc / 2) / ptirc;
430 fpga_tumbl_dmem[0] = 0;
431 fpga_tumbl_dmem[1] = (pwm_d << 16) | (pwm_q & 0xffff);
433 fpga_tumbl_dmem[4] = ptirc;
434 fpga_tumbl_dmem[5] = ptreci;
435 fpga_tumbl_dmem[6] = ptofs;
437 pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
439 fpga_tumbl_dmem[0] = 1;
441 printf("spd %ld\n",mcs->pxms_as);
446 #define CK_IRC_WORDS 16
447 #define CK_TX_WORDS 16
448 #define CK_RX_WORDS 16
450 #define CK_IRC_START ((uint32_t*)fpga_irc[0])
451 #define CK_TX_START (fpga_lx_master_transmitter_base+9)
452 #define CK_RX_START (fpga_lx_master_receiver_base+44)
454 typedef struct ck_state_t {
455 uint32_t ck_irc_base[CK_IRC_WORDS];
456 uint32_t ck_irc_read[CK_IRC_WORDS];
457 uint32_t ck_tx_base[CK_TX_WORDS];
458 uint32_t ck_tx_read[CK_TX_WORDS];
459 uint32_t ck_rx_base[CK_RX_WORDS];
460 uint32_t ck_rx_read[CK_RX_WORDS];
467 int cmd_do_testtumblebus(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
471 static ck_state_t *ckst = NULL;
473 ckst = malloc(sizeof(*ckst));
477 ckst->ck_irc_err = 0;
481 for (i = 0; i < CK_IRC_WORDS; i++)
482 ckst->ck_irc_base[i] = CK_IRC_START[i];
484 for (i = 0; i < CK_TX_WORDS; i++)
485 ckst->ck_tx_base[i] = CK_TX_START[i];
487 for (i = 0; i < CK_RX_WORDS; i++)
488 ckst->ck_rx_base[i] = CK_RX_START[i];
491 if (!ckst->ck_irc_err) {
492 for (i = 0; i < CK_IRC_WORDS; i++)
493 ckst->ck_irc_read[i] = CK_IRC_START[i];
494 for (i = 0; i < CK_IRC_WORDS; i++)
495 if (ckst->ck_irc_read[i] != ckst->ck_irc_base[i]) {
497 printf("irc+%x %08"PRIx32" != %08"PRIx32"\n",
498 i, ckst->ck_irc_read[i], ckst->ck_irc_base[i]);
502 if (!ckst->ck_tx_err) {
503 for (i = 0; i < CK_TX_WORDS; i++)
504 ckst->ck_tx_read[i] = CK_TX_START[i];
505 for (i = 0; i < CK_TX_WORDS; i++)
506 if (ckst->ck_tx_read[i] != ckst->ck_tx_base[i]) {
508 printf("tx+%x %08"PRIx32" != %08"PRIx32"\n",
509 i, ckst->ck_tx_read[i], ckst->ck_tx_base[i]);
513 if (!ckst->ck_rx_err) {
514 for (i = 0; i < CK_RX_WORDS; i++)
515 ckst->ck_rx_read[i] = CK_RX_START[i];
516 for (i = 0; i < CK_RX_WORDS; i++)
517 if (ckst->ck_rx_read[i] != ckst->ck_rx_base[i]) {
519 printf("rx+%x %08"PRIx32" != %08"PRIx32"\n",
520 i, ckst->ck_rx_read[i], ckst->ck_rx_base[i]);
528 cmd_des_t const cmd_des_test_memusage = {0, 0,
529 "memusage", "report memory usage", cmd_do_test_memusage,
536 cmd_des_t const cmd_des_test_adc = {0, 0,
537 "testadc", "adc test", cmd_do_test_adc,
544 #ifdef APPL_WITH_DISTORE_EEPROM_USER
545 cmd_des_t const cmd_des_test_distore = {0, 0,
546 "testdistore", "test DINFO store", cmd_do_test_distore,
553 cmd_des_t const cmd_des_test_diload = {0, 0,
554 "testdiload", "test DINFO load", cmd_do_test_diload,
560 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
562 cmd_des_t const cmd_des_test_loglevel = {0, 0,
563 "loglevel", "select logging level",
564 cmd_do_test_loglevel, {}
567 cmd_des_t const cmd_des_spimst = {0, CDESM_OPCHR | CDESM_WR,
568 "SPIMST", "SPI master communication request",
569 cmd_do_spimst_blocking, {(void *)0}
572 cmd_des_t const cmd_des_spimstx = {0, CDESM_OPCHR | CDESM_WR,
573 "SPIMST#", "SPI# master communication request",
574 cmd_do_spimst_blocking, {(void *) - 1}
578 cmd_des_t const cmd_des_testsdram = {0, 0,
579 "testsdram", "test SDRAM",
580 cmd_do_testsdram, {(void *)0}
582 #endif /*SDRAM_BASE*/
585 cmd_des_t const cmd_des_testlxpwrrx = {0, 0,
586 "testlxpwrrx", "capture data stream from lxpwr",
587 cmd_do_testlxpwrrx, {(void *)0}
590 cmd_des_t const cmd_des_testlxpwrstat = {0, 0,
591 "testlxpwrstat", "lxpwr interrupt statistic",
592 cmd_do_testlxpwrstat, {(void *)0}
595 cmd_des_t const cmd_des_testfncapprox = {0, 0,
596 "testfncapprox", "test of function approximator",
597 cmd_do_testfncapprox, {(void *)0}
600 cmd_des_t const cmd_des_testtumblefw = {0, 0,
601 "testtumblefw", "test Tumble coprocesor firmware",
602 cmd_do_testtumblefw, {(void *)0}
605 cmd_des_t const cmd_des_testtumblebus = {0, 0,
606 "testtumblebus", "test Tumble coprocesor bus",
607 cmd_do_testtumblebus, {(void *)0}
611 cmd_des_t const *const cmd_appl_tests[] =
613 &cmd_des_test_memusage,
615 #ifdef APPL_WITH_DISTORE_EEPROM_USER
616 &cmd_des_test_distore,
617 &cmd_des_test_diload,
618 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
619 &cmd_des_test_loglevel,
624 #endif /*SDRAM_BASE*/
625 &cmd_des_testlxpwrrx,
626 &cmd_des_testlxpwrstat,
627 &cmd_des_testfncapprox,
628 &cmd_des_testtumblefw,
629 &cmd_des_testtumblebus,