MBTumbl: Pseudoforked, removed unsupported instructions from opcodes

[fpga/lx-cpu1/binutils-tumbl.git] / opcodes / microblaze-opcm.h

diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
index 10acacfee29efb442a42a73a4a8006f2cf4a6b27..8872eec6b39b9365e52b99145f2b324ce3b4339f 100644 (file)
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -23,6 +23,25 @@
 #ifndef MICROBLAZE_OPCM
 #define MICROBLAZE_OPCM
 
+#ifdef ARCH_mbtumbl
+
+enum microblaze_instr
+{
+  add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, cmp, cmpu,
+  addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, muli,
+  bsll, bsra, bsrl, bslli, bsrai, bsrli, or, and, xor,
+  andn, sra, src, srl, sext8, sext16, mts, mfs, br, brd,
+  brld, bra, brad, brald, beq, beqd, bne, bned, blt,
+  bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
+  imm, rtsd, rtid, bri, brid, brlid, brai, braid, bralid,
+  beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
+  bgtid, bgei, bgeid, lbu, lhu, lw, lwx, sb, sh, sw, swx, lbui, lhui, lwi,
+  sbi, shi, swi,
+  invalid_inst
+};
+
+#else
+
 enum microblaze_instr
 {
   add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, cmp, cmpu,
@@ -58,6 +77,8 @@ enum microblaze_instr
   invalid_inst
 };
 
+#endif
+
 enum microblaze_instr_type
 {
   arithmetic_inst, logical_inst, mult_inst, div_inst, branch_inst,