*reg = REG_MSR;
return s + 4;
}
+#ifndef ARCH_mbtumbl
else if (strncasecmp (s, "rear", 4) == 0)
{
*reg = REG_EAR;
}
return s;
}
+#endif
else
{
if (TOLOWER (s[0]) == 'r')
check_spl_reg (unsigned * reg)
{
if ((*reg == REG_MSR) || (*reg == REG_PC)
+#ifndef ARCH_mbtumbl
|| (*reg == REG_EAR) || (*reg == REG_ESR)
|| (*reg == REG_FSR) || (*reg == REG_BTR) || (*reg == REG_EDR)
|| (*reg == REG_PID) || (*reg == REG_ZPR)
|| (*reg == REG_TLBX) || (*reg == REG_TLBLO)
|| (*reg == REG_TLBHI) || (*reg == REG_TLBSX)
- || (*reg >= REG_PVR+MIN_PVR_REGNUM && *reg <= REG_PVR+MAX_PVR_REGNUM))
+ || (*reg >= REG_PVR+MIN_PVR_REGNUM && *reg <= REG_PVR+MAX_PVR_REGNUM)
+#endif
+ )
return TRUE;
return FALSE;
as_fatal (_("Cannot use special register with this instruction"));
if (exp.X_op != O_constant)
+ {
as_warn (_("Symbol used as immediate for shift instruction"));
+ immed = 0;
+ }
else
{
output = frag_more (isize);
output = frag_more (isize);
break;
+#ifndef ARCH_mbtumbl
case INST_TYPE_RD_RFSL:
if (strcmp (op_end, ""))
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
inst |= (immed << IMM_LOW) & RFSL_MASK;
output = frag_more (isize);
break;
+#endif
case INST_TYPE_R1:
if (strcmp (op_end, ""))
break;
/* For tuqula insn...:) */
+#ifndef ARCH_mbtumbl
case INST_TYPE_RD:
if (strcmp (op_end, ""))
op_end = parse_reg (op_end + 1, ®1); /* Get rd. */
inst |= (reg1 << RD_LOW) & RD_MASK;
output = frag_more (isize);
break;
+#endif
case INST_TYPE_RD_SPECIAL:
if (strcmp (op_end, ""))
immed = opcode->immval_mask | REG_MSR_MASK;
else if (reg2 == REG_PC)
immed = opcode->immval_mask | REG_PC_MASK;
+#ifndef ARCH_mbtumbl
else if (reg2 == REG_EAR)
immed = opcode->immval_mask | REG_EAR_MASK;
else if (reg2 == REG_ESR)
immed = opcode->immval_mask | REG_TLBHI_MASK;
else if (reg2 >= (REG_PVR+MIN_PVR_REGNUM) && reg2 <= (REG_PVR+MAX_PVR_REGNUM))
immed = opcode->immval_mask | REG_PVR_MASK | reg2;
+#endif
else
as_fatal (_("invalid value for special purpose register"));
inst |= (reg1 << RD_LOW) & RD_MASK;
immed = opcode->immval_mask | REG_MSR_MASK;
else if (reg1 == REG_PC)
immed = opcode->immval_mask | REG_PC_MASK;
+#ifndef ARCH_mbtumbl
else if (reg1 == REG_EAR)
immed = opcode->immval_mask | REG_EAR_MASK;
else if (reg1 == REG_ESR)
immed = opcode->immval_mask | REG_TLBHI_MASK;
else if (reg1 == REG_TLBSX)
immed = opcode->immval_mask | REG_TLBSX_MASK;
+#endif
else
as_fatal (_("invalid value for special purpose register"));
inst |= (reg2 << RA_LOW) & RA_MASK;