1 /* Disassemble Xilinx microblaze instructions.
3 Copyright 2009, 2012 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
29 #include "microblaze-opc.h"
30 #include "microblaze-dis.h"
32 #define get_field_rd(instr) get_field (instr, RD_MASK, RD_LOW)
33 #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW)
34 #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW)
35 #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW)
36 #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW)
41 get_field (long instr, long mask, unsigned short low)
45 sprintf (tmpstr, "%s%d", register_prefix, (int)((instr & mask) >> low));
46 return (strdup (tmpstr));
50 get_field_imm (long instr)
54 sprintf (tmpstr, "%d", (short)((instr & IMM_MASK) >> IMM_LOW));
55 return (strdup (tmpstr));
59 get_field_imm5 (long instr)
63 sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
64 return (strdup (tmpstr));
70 get_field_rfsl (long instr)
74 sprintf (tmpstr, "%s%d", fsl_register_prefix,
75 (short)((instr & RFSL_MASK) >> IMM_LOW));
76 return (strdup (tmpstr));
80 get_field_imm15 (long instr)
84 sprintf (tmpstr, "%d", (short)((instr & IMM15_MASK) >> IMM_LOW));
85 return (strdup (tmpstr));
91 get_field_special (long instr, struct op_code_struct * op)
96 switch ((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask))
127 strcpy (spr, "tlbx");
129 case REG_TLBLO_MASK :
130 strcpy (spr, "tlblo");
132 case REG_TLBHI_MASK :
133 strcpy (spr, "tlbhi");
135 case REG_TLBSX_MASK :
136 strcpy (spr, "tlbsx");
139 if (((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask) & 0xE000)
142 sprintf (tmpstr, "%spvr%d", register_prefix,
143 (unsigned short)(((instr & IMM_MASK) >> IMM_LOW)
144 ^ op->immval_mask) ^ REG_PVR_MASK);
145 return (strdup (tmpstr));
157 sprintf (tmpstr, "%s%s", register_prefix, spr);
158 return (strdup (tmpstr));
162 read_insn_microblaze (bfd_vma memaddr,
163 struct disassemble_info *info,
164 struct op_code_struct **opr)
166 unsigned char ibytes[4];
168 struct op_code_struct * op;
171 status = info->read_memory_func (memaddr, ibytes, 4, info);
175 info->memory_error_func (status, memaddr, info);
179 if (info->endian == BFD_ENDIAN_BIG)
180 inst = (ibytes[0] << 24) | (ibytes[1] << 16) | (ibytes[2] << 8) | ibytes[3];
181 else if (info->endian == BFD_ENDIAN_LITTLE)
182 inst = (ibytes[3] << 24) | (ibytes[2] << 16) | (ibytes[1] << 8) | ibytes[0];
186 /* Just a linear search of the table. */
187 for (op = opcodes; op->name != 0; op ++)
188 if (op->bit_sequence == (inst & op->opcode_mask))
197 print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
199 fprintf_ftype print_func = info->fprintf_func;
200 void * stream = info->stream;
201 unsigned long inst, prev_inst;
202 struct op_code_struct * op, *pop;
204 bfd_boolean immfound = FALSE;
205 static bfd_vma prev_insn_addr = -1; /* Init the prev insn addr. */
206 static int prev_insn_vma = -1; /* Init the prev insn vma. */
207 int curr_insn_vma = info->buffer_vma;
209 info->bytes_per_chunk = 4;
211 inst = read_insn_microblaze (memaddr, info, &op);
215 if (prev_insn_vma == curr_insn_vma)
217 if (memaddr-(info->bytes_per_chunk) == prev_insn_addr)
219 prev_inst = read_insn_microblaze (prev_insn_addr, info, &pop);
222 if (pop->instr == imm)
224 immval = (get_int_field_imm (prev_inst) << 16) & 0xffff0000;
235 /* Make curr insn as prev insn. */
236 prev_insn_addr = memaddr;
237 prev_insn_vma = curr_insn_vma;
239 if (op->name == NULL)
240 print_func (stream, ".short 0x%04x", (unsigned int) inst);
243 print_func (stream, "%s", op->name);
245 switch (op->inst_type)
247 case INST_TYPE_RD_R1_R2:
248 print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
249 get_field_r1(inst), get_field_r2 (inst));
251 case INST_TYPE_RD_R1_IMM:
252 print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
253 get_field_r1(inst), get_field_imm (inst));
254 if (info->print_address_func && get_int_field_r1 (inst) == 0
255 && info->symbol_at_address_func)
258 immval |= (get_int_field_imm (inst) & 0x0000ffff);
261 immval = get_int_field_imm (inst);
263 immval |= 0xFFFF0000;
265 if (immval > 0 && info->symbol_at_address_func (immval, info))
267 print_func (stream, "\t// ");
268 info->print_address_func (immval, info);
272 case INST_TYPE_RD_R1_IMM5:
273 print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
274 get_field_r1(inst), get_field_imm5 (inst));
277 case INST_TYPE_RD_RFSL:
278 print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
280 case INST_TYPE_R1_RFSL:
281 print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_rfsl (inst));
284 case INST_TYPE_RD_SPECIAL:
285 print_func (stream, "\t%s, %s", get_field_rd (inst),
286 get_field_special (inst, op));
288 case INST_TYPE_SPECIAL_R1:
289 print_func (stream, "\t%s, %s", get_field_special (inst, op),
292 case INST_TYPE_RD_R1:
293 print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r1 (inst));
295 case INST_TYPE_R1_R2:
296 print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_r2 (inst));
298 case INST_TYPE_R1_IMM:
299 print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_imm (inst));
300 /* The non-pc relative instructions are returns, which shouldn't
301 have a label printed. */
302 if (info->print_address_func && op->inst_offset_type == INST_PC_OFFSET
303 && info->symbol_at_address_func)
306 immval |= (get_int_field_imm (inst) & 0x0000ffff);
309 immval = get_int_field_imm (inst);
311 immval |= 0xFFFF0000;
314 if (immval > 0 && info->symbol_at_address_func (immval, info))
316 print_func (stream, "\t// ");
317 info->print_address_func (immval, info);
321 print_func (stream, "\t\t// ");
322 print_func (stream, "%x", immval);
326 case INST_TYPE_RD_IMM:
327 print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm (inst));
328 if (info->print_address_func && info->symbol_at_address_func)
331 immval |= (get_int_field_imm (inst) & 0x0000ffff);
334 immval = get_int_field_imm (inst);
336 immval |= 0xFFFF0000;
338 if (op->inst_offset_type == INST_PC_OFFSET)
339 immval += (int) memaddr;
340 if (info->symbol_at_address_func (immval, info))
342 print_func (stream, "\t// ");
343 info->print_address_func (immval, info);
349 print_func (stream, "\t%s", get_field_imm (inst));
350 if (info->print_address_func && info->symbol_at_address_func
353 if ((immfound) && (op->inst_type != INST_TYPE_IMM5))
354 immval |= (get_int_field_imm (inst) & 0x0000ffff);
357 if (op->inst_type == INST_TYPE_IMM5)
358 immval = get_int_field_imm5 (inst);
361 immval = get_int_field_imm (inst);
363 immval |= 0xFFFF0000;
366 if (op->inst_offset_type == INST_PC_OFFSET)
367 immval += (int) memaddr;
368 if (immval > 0 && info->symbol_at_address_func (immval, info))
370 print_func (stream, "\t// ");
371 info->print_address_func (immval, info);
373 else if (op->inst_offset_type == INST_PC_OFFSET)
375 print_func (stream, "\t\t// ");
376 print_func (stream, "%x", immval);
380 case INST_TYPE_RD_R2:
381 print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
384 print_func (stream, "\t%s", get_field_r2 (inst));
387 print_func (stream, "\t%s", get_field_r1 (inst));
389 case INST_TYPE_RD_R1_SPECIAL:
390 print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
393 case INST_TYPE_RD_IMM15:
394 print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
396 /* For tuqula instruction */
398 print_func (stream, "\t%s", get_field_rd (inst));
401 print_func (stream, "\t%s", get_field_rfsl (inst));
405 /* If the disassembler lags the instruction set. */
406 print_func (stream, "\tundecoded operands, inst is 0x%04x", (unsigned int) inst);
411 /* Say how many bytes we consumed. */
415 enum microblaze_instr
416 get_insn_microblaze (long inst,
417 bfd_boolean *isunsignedimm,
418 enum microblaze_instr_type *insn_type,
421 struct op_code_struct * op;
422 *isunsignedimm = FALSE;
424 /* Just a linear search of the table. */
425 for (op = opcodes; op->name != 0; op ++)
426 if (op->bit_sequence == (inst & op->opcode_mask))
433 *isunsignedimm = (op->inst_type == INST_TYPE_RD_R1_UNSIGNED_IMM);
434 *insn_type = op->instr_type;
435 *delay_slots = op->delay_slots;
440 enum microblaze_instr
441 microblaze_decode_insn (long insn, int *rd, int *ra, int *rb, int *immed)
443 enum microblaze_instr op;
445 enum microblaze_instr_type t2;
448 op = get_insn_microblaze (insn, &t1, &t2, &t3);
449 *rd = (insn & RD_MASK) >> RD_LOW;
450 *ra = (insn & RA_MASK) >> RA_LOW;
451 *rb = (insn & RB_MASK) >> RB_LOW;
452 t3 = (insn & IMM_MASK) >> IMM_LOW;
458 microblaze_get_target_address (long inst, bfd_boolean immfound, int immval,
459 long pcval, long r1val, long r2val,
460 bfd_boolean *targetvalid,
461 bfd_boolean *unconditionalbranch)
463 struct op_code_struct * op;
466 *unconditionalbranch = FALSE;
467 /* Just a linear search of the table. */
468 for (op = opcodes; op->name != 0; op ++)
469 if (op->bit_sequence == (inst & op->opcode_mask))
474 *targetvalid = FALSE;
476 else if (op->instr_type == branch_inst)
478 switch (op->inst_type)
481 *unconditionalbranch = TRUE;
483 case INST_TYPE_RD_R2:
484 case INST_TYPE_R1_R2:
487 if (op->inst_offset_type == INST_PC_OFFSET)
491 *unconditionalbranch = TRUE;
493 case INST_TYPE_RD_IMM:
494 case INST_TYPE_R1_IMM:
497 targetaddr = (immval << 16) & 0xffff0000;
498 targetaddr |= (get_int_field_imm (inst) & 0x0000ffff);
502 targetaddr = get_int_field_imm (inst);
503 if (targetaddr & 0x8000)
504 targetaddr |= 0xFFFF0000;
506 if (op->inst_offset_type == INST_PC_OFFSET)
511 *targetvalid = FALSE;
515 else if (op->instr_type == return_inst)
519 targetaddr = (immval << 16) & 0xffff0000;
520 targetaddr |= (get_int_field_imm (inst) & 0x0000ffff);
524 targetaddr = get_int_field_imm (inst);
525 if (targetaddr & 0x8000)
526 targetaddr |= 0xFFFF0000;
532 *targetvalid = FALSE;