RPi PMSM Motor Control - start of hardware section.

[ert_linux_web.git] / rpi-pmsm-control / index.html

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@@ -39,9 +39,11 @@ u<sub>B</sub>, u<sub>C</sub>) only differences count, i.e. one can be
 fixed to zero. A sum of the three currents (i<sub>A</sub>, i<sub>B</sub>,
 i<sub>C</sub>) has to be zero by the Kirchhoff's current law. As a consequence,
 only two independent quantities/scalars are needed to describe the currents
-or Voltages which are in the fact vector in the 2D space. The polar coordinates
+or Voltages which are in the fact vector in the 2D space.The polar coordinates
 system can be used but a rectangular system of alpha, beta components is equivalent
-and easier for transformations computation. This transformation of the three phase
+and easier for transformations computation.
+[[!img pxmc-pmsm-block.png size="500x" align=right alt="Basic PMSM control setup diagram from PXMC library documentation"]]
+This transformation of the three phase
 system to the two orthogonal components vector is named according to its
 inventor Clark transformation. The waveforms in this 2D system are sine
 and cosine for steady speed state. Because realization of a controller
@@ -53,9 +55,29 @@ introduced by Robert H. Park and the transformation is named according to him.
 The control in the D-Q coordinates is (almost) independent of actual rotor
 position and (in simplified outlook) separates reactive current (i<sub>D</sub>)
 from the active current (i<sub>Q</sub>) resulting in torque affecting rotor
-movement.
+movement. The simplified diagram of PMSM motor control ins included for ilustration
+(source <a href="https://www.pxmc.org/">PXMC</a> library documentation).
 </p>
-[[!img pxmc-pmsm-block.png size="300x" align=right alt="Basic PMSM control setup diagram from PXMC library documentation"]]
+
+<h2 id="hardware">Hardware</h2>
+<p>
+The RPi (and its BCM2835 SoC) is equipped with only single accessible
+PWM output and no peripherals suitable for incremental rotary encoder
+(IRC) signal processing are found on the board. Analog to digital
+converters are missing as well. The two extension boards with required
+peripherals and power stage have been designed and produced at <a href="http://www.pikron.com/" target="_blank">PiKRON</a> company.
+The first one includes Field Programmable Gate Array (<a href="https://en.wikipedia.org/wiki/Field-programmable_gate_array" target="_blank">FPGA</a>) <a href="http://www.microsemi.com/products/fpga-soc/fpga/igloo-e" target="_blank">IGLOO AGL125-VQ100</a> produced by Microsemi company. The design of logic programmed into FPGA has been implemented by Martin Prudek in a frame of his <a href="https://dspace.cvut.cz/bitstream/handle/10467/62036/F3-BP-2015-Prudek-Martin-Bp_2015_prudek_martin.pdf" target="_blank">bachelor theses</a>. The FPGA design includes:
+</p>
+<ul>
+  <li>SPI interface which connect peripherals to RPi board
+  </li>
+  <li>32-bit qudrate encoder (IRC) position counter based on design of Marek Peca's (<a href="https://rtime.felk.cvut.cz/gitweb/fpga/quadcount.git" target="_blank"> quadcount</a>)
+  </li>
+  <li>three PWM outputs with half-bridge enable enable signals
+  </li>
+  <li>finite state automata for acquiring current measuremts from analog to digital converter and filtering/decimation of multiple fast reads for slower RPi processing
+  </li>
+</ul>
 
 </div>