bool
select BR2_ARM_CPU_HAS_VFPV3
+config BR2_ARM_CPU_HAS_FP_ARMV8
+ bool
+ select BR2_ARM_CPU_HAS_VFPV4
+
config BR2_ARM_CPU_HAS_ARM
bool
config BR2_ARM_CPU_ARMV7A
bool
+config BR2_ARM_CPU_ARMV7M
+ bool
+
+config BR2_ARM_CPU_ARMV8A
+ bool
+
choice
prompt "Target Architecture Variant"
- depends on BR2_arm || BR2_armeb
+ default BR2_cortex_a53 if BR2_ARCH_IS_64
default BR2_arm926t
help
Specific CPU variant to use
+if !BR2_ARCH_IS_64
+comment "armv4 cores"
config BR2_arm920t
bool "arm920t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_fa526
+ bool "fa526/626"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_strongarm
+ bool "strongarm sa110/sa1100"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_ARMV4
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+
+comment "armv5 cores"
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_iwmmxt
+ bool "iwmmxt"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_xscale
+ bool "xscale"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_HAS_THUMB
+ select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+
+comment "armv6 cores"
config BR2_arm1136j_s
bool "arm1136j-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_arm11mpcore
+ bool "mpcore"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_MAYBE_HAS_VFPV2
+ select BR2_ARM_CPU_HAS_THUMB
+ select BR2_ARM_CPU_ARMV6
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+
+comment "armv7a cores"
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_cortex_m3
- bool "cortex-M3"
- select BR2_ARM_CPU_HAS_THUMB
+config BR2_cortex_a15_a7
+ bool "cortex-A15/A7 big.LITTLE"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_HAS_NEON
+ select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
-config BR2_fa526
- bool "fa526/626"
+ select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+config BR2_cortex_a17
+ bool "cortex-A17"
select BR2_ARM_CPU_HAS_ARM
- select BR2_ARM_CPU_ARMV4
+ select BR2_ARM_CPU_HAS_NEON
+ select BR2_ARM_CPU_HAS_VFPV4
+ select BR2_ARM_CPU_HAS_THUMB2
+ select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+config BR2_cortex_a17_a7
+ bool "cortex-A17/A7 big.LITTLE"
+ select BR2_ARM_CPU_HAS_ARM
+ select BR2_ARM_CPU_HAS_NEON
+ select BR2_ARM_CPU_HAS_VFPV4
+ select BR2_ARM_CPU_HAS_THUMB2
+ select BR2_ARM_CPU_ARMV7A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_strongarm
- bool "strongarm sa110/sa1100"
+
+comment "armv7m cores"
+config BR2_cortex_m3
+ bool "cortex-M3"
+ select BR2_ARM_CPU_HAS_THUMB2
+ select BR2_ARM_CPU_ARMV7M
+config BR2_cortex_m4
+ bool "cortex-M4"
+ select BR2_ARM_CPU_HAS_THUMB2
+ select BR2_ARM_CPU_ARMV7M
+endif # !BR2_ARCH_IS_64
+
+comment "armv8 cores"
+config BR2_cortex_a32
+ bool "cortex-A32"
+ depends on !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_ARM
- select BR2_ARM_CPU_ARMV4
+ select BR2_ARM_CPU_HAS_NEON
+ select BR2_ARM_CPU_HAS_THUMB2
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_xscale
- bool "xscale"
- select BR2_ARM_CPU_HAS_ARM
- select BR2_ARM_CPU_HAS_THUMB
- select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+config BR2_cortex_a35
+ bool "cortex-A35"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
-config BR2_iwmmxt
- bool "iwmmxt"
- select BR2_ARM_CPU_HAS_ARM
- select BR2_ARM_CPU_ARMV5
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+config BR2_cortex_a53
+ bool "cortex-A53"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_cortex_a57
+ bool "cortex-A57"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+config BR2_cortex_a57_a53
+ bool "cortex-A57/A53 big.LITTLE"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+config BR2_cortex_a72
+ bool "cortex-A72"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+config BR2_cortex_a72_a53
+ bool "cortex-A72/A53 big.LITTLE"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+config BR2_cortex_a73
+ bool "cortex-A73"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_cortex_a73_a35
+ bool "cortex-A73/A35 big.LITTLE"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_cortex_a73_a53
+ bool "cortex-A73/A53 big.LITTLE"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_exynos_m1
+ bool "exynos-m1"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+config BR2_falkor
+ bool "falkor"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_qdf24xx
+ bool "qdf24xx"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+if BR2_ARCH_IS_64
+config BR2_thunderx
+ bool "thunderx"
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+config BR2_thunderxt81
+ bool "thunderxt81"
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderxt83
+ bool "thunderxt83"
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderxt88
+ bool "thunderxt88"
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderxt88p1
+ bool "thunderxt88p1"
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+endif # BR2_ARCH_IS_64
+config BR2_xgene1
+ bool "xgene1"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+
+if BR2_ARCH_IS_64
+comment "armv8.1a cores"
+config BR2_thunderx2t99
+ bool "thunderx2t99"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderx2t99p1
+ bool "thunderx2t99p1"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_vulcan
+ bool "vulcan"
+ select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV8A
+ select BR2_ARCH_HAS_MMU_OPTIONAL
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+endif # BR2_ARCH_IS_64
endchoice
config BR2_ARM_ENABLE_NEON
choice
prompt "Target ABI"
- depends on BR2_arm || BR2_armeb
default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
default BR2_ARM_EABI
+ depends on BR2_arm || BR2_armeb
help
Application Binary Interface to use. The Application Binary
Interface describes the calling conventions (how arguments
choice
prompt "Floating point strategy"
- depends on BR2_ARM_EABI || BR2_ARM_EABIHF
+ default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
example on Cortex-A5 and Cortex-A7, support for VFPv4 and
NEON is optional.
+config BR2_ARM_FPU_FP_ARMV8
+ bool "FP-ARMv8"
+ depends on BR2_ARM_CPU_HAS_FP_ARMV8
+ help
+ This option allows to use the ARMv8 floating point unit.
+
+config BR2_ARM_FPU_NEON_FP_ARMV8
+ bool "NEON/FP-ARMv8"
+ depends on BR2_ARM_CPU_HAS_FP_ARMV8
+ depends on BR2_ARM_CPU_HAS_NEON
+ help
+ This option allows to use both the ARMv8 floating point unit
+ and the NEON SIMD unit for floating point operations.
+
endchoice
choice
prompt "ARM instruction set"
+ depends on BR2_arm || BR2_armeb
config BR2_ARM_INSTRUCTIONS_ARM
bool "ARM"
endchoice
config BR2_ARCH
- default "arm" if BR2_arm
- default "armeb" if BR2_armeb
+ default "arm" if BR2_arm
+ default "armeb" if BR2_armeb
+ default "aarch64" if BR2_aarch64
+ default "aarch64_be" if BR2_aarch64_be
config BR2_ENDIAN
- default "LITTLE" if BR2_arm
- default "BIG" if BR2_armeb
-
-config BR2_ARCH_HAS_ATOMICS
- default y
+ default "LITTLE" if (BR2_arm || BR2_aarch64)
+ default "BIG" if (BR2_armeb || BR2_aarch64_be)
config BR2_GCC_TARGET_CPU
+ # armv4
default "arm920t" if BR2_arm920t
default "arm922t" if BR2_arm922t
+ default "fa526" if BR2_fa526
+ default "strongarm" if BR2_strongarm
+ # armv5
default "arm926ej-s" if BR2_arm926t
+ default "iwmmxt" if BR2_iwmmxt
+ default "xscale" if BR2_xscale
+ # armv6
default "arm1136j-s" if BR2_arm1136j_s
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
+ default "mpcore" if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
+ default "mpcorenovfp" if BR2_arm11mpcore
+ # armv7a
default "cortex-a5" if BR2_cortex_a5
default "cortex-a7" if BR2_cortex_a7
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
default "cortex-a12" if BR2_cortex_a12
default "cortex-a15" if BR2_cortex_a15
- default "cortex-m3" if BR2_cortex_m3
- default "fa526" if BR2_fa526
+ default "cortex-a15.cortex-a7" if BR2_cortex_a15_a7
+ default "cortex-a17" if BR2_cortex_a17
+ default "cortex-a17.cortex-a7" if BR2_cortex_a17_a7
default "marvell-pj4" if BR2_pj4
- default "strongarm" if BR2_strongarm
- default "xscale" if BR2_xscale
- default "iwmmxt" if BR2_iwmmxt
+ # armv7m
+ default "cortex-m3" if BR2_cortex_m3
+ default "cortex-m4" if BR2_cortex_m4
+ # armv8a
+ default "cortex-a32" if BR2_cortex_a32
+ default "cortex-a35" if BR2_cortex_a35
+ default "cortex-a53" if BR2_cortex_a53
+ default "cortex-a57" if BR2_cortex_a57
+ default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
+ default "cortex-a72" if BR2_cortex_a72
+ default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
+ default "cortex-a73" if BR2_cortex_a73
+ default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
+ default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
+ default "exynos-m1" if BR2_exynos_m1
+ default "falkor" if BR2_falkor
+ default "qdf24xx" if BR2_qdf24xx
+ default "thunderx" if BR2_thunderx
+ default "thunderxt81" if BR2_thunderxt81
+ default "thunderxt83" if BR2_thunderxt83
+ default "thunderxt88" if BR2_thunderxt88
+ default "thunderxt88p1" if BR2_thunderxt88p1
+ default "xgene1" if BR2_xgene1
+ # armv8.1a
+ default "thunderx2t99" if BR2_thunderx2t99
+ default "thunderx2t99p1" if BR2_thunderx2t99p1
+ default "vulcan" if BR2_vulcan
config BR2_GCC_TARGET_ABI
- default "aapcs-linux"
+ default "aapcs-linux" if BR2_arm || BR2_armeb
+ default "lp64" if BR2_aarch64 || BR2_aarch64_be
config BR2_GCC_TARGET_FPU
default "vfp" if BR2_ARM_FPU_VFPV2
default "vfpv3" if BR2_ARM_FPU_VFPV3
- default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
- default "vfpv4" if BR2_ARM_FPU_VFPV4
- default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
- default "neon" if BR2_ARM_FPU_NEON
- default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
+ default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
+ default "vfpv4" if BR2_ARM_FPU_VFPV4
+ default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
+ default "neon" if BR2_ARM_FPU_NEON
+ default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
+ default "fp-armv8" if BR2_ARM_FPU_FP_ARMV8
+ default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
+ depends on BR2_arm || BR2_armeb
config BR2_GCC_TARGET_FLOAT_ABI
default "soft" if BR2_ARM_SOFT_FLOAT
config BR2_GCC_TARGET_MODE
default "arm" if BR2_ARM_INSTRUCTIONS_ARM
default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
+
+config BR2_READELF_ARCH_NAME
+ default "ARM" if BR2_arm || BR2_armeb
+ default "AArch64" if BR2_aarch64 || BR2_aarch64_be
projects / coffee / buildroot.git / blobdiff