arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_FP_ARMV8
  35         bool
  36         select BR2_ARM_CPU_HAS_VFPV4
  37
  38 config BR2_ARM_CPU_HAS_ARM
  39         bool
  40
  41 config BR2_ARM_CPU_HAS_THUMB
  42         bool
  43
  44 config BR2_ARM_CPU_HAS_THUMB2
  45         bool
  46
  47 config BR2_ARM_CPU_ARMV4
  48         bool
  49
  50 config BR2_ARM_CPU_ARMV5
  51         bool
  52
  53 config BR2_ARM_CPU_ARMV6
  54         bool
  55
  56 config BR2_ARM_CPU_ARMV7A
  57         bool
  58
  59 config BR2_ARM_CPU_ARMV7M
  60         bool
  61
  62 config BR2_ARM_CPU_ARMV8A
  63         bool
  64
  65 choice
  66         prompt "Target Architecture Variant"
  67         default BR2_cortex_a53 if BR2_ARCH_IS_64
  68         default BR2_arm926t
  69         help
  70           Specific CPU variant to use
  71
  72 if !BR2_ARCH_IS_64
  73 comment "armv4 cores"
  74 config BR2_arm920t
  75         bool "arm920t"
  76         select BR2_ARM_CPU_HAS_ARM
  77         select BR2_ARM_CPU_HAS_THUMB
  78         select BR2_ARM_CPU_ARMV4
  79         select BR2_ARCH_HAS_MMU_OPTIONAL
  80 config BR2_arm922t
  81         bool "arm922t"
  82         select BR2_ARM_CPU_HAS_ARM
  83         select BR2_ARM_CPU_HAS_THUMB
  84         select BR2_ARM_CPU_ARMV4
  85         select BR2_ARCH_HAS_MMU_OPTIONAL
  86 config BR2_fa526
  87         bool "fa526/626"
  88         select BR2_ARM_CPU_HAS_ARM
  89         select BR2_ARM_CPU_ARMV4
  90         select BR2_ARCH_HAS_MMU_OPTIONAL
  91 config BR2_strongarm
  92         bool "strongarm sa110/sa1100"
  93         select BR2_ARM_CPU_HAS_ARM
  94         select BR2_ARM_CPU_ARMV4
  95         select BR2_ARCH_HAS_MMU_OPTIONAL
  96
  97 comment "armv5 cores"
  98 config BR2_arm926t
  99         bool "arm926t"
 100         select BR2_ARM_CPU_HAS_ARM
 101         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 102         select BR2_ARM_CPU_HAS_THUMB
 103         select BR2_ARM_CPU_ARMV5
 104         select BR2_ARCH_HAS_MMU_OPTIONAL
 105 config BR2_iwmmxt
 106         bool "iwmmxt"
 107         select BR2_ARM_CPU_HAS_ARM
 108         select BR2_ARM_CPU_ARMV5
 109         select BR2_ARCH_HAS_MMU_OPTIONAL
 110 config BR2_xscale
 111         bool "xscale"
 112         select BR2_ARM_CPU_HAS_ARM
 113         select BR2_ARM_CPU_HAS_THUMB
 114         select BR2_ARM_CPU_ARMV5
 115         select BR2_ARCH_HAS_MMU_OPTIONAL
 116
 117 comment "armv6 cores"
 118 config BR2_arm1136j_s
 119         bool "arm1136j-s"
 120         select BR2_ARM_CPU_HAS_ARM
 121         select BR2_ARM_CPU_HAS_THUMB
 122         select BR2_ARM_CPU_ARMV6
 123         select BR2_ARCH_HAS_MMU_OPTIONAL
 124 config BR2_arm1136jf_s
 125         bool "arm1136jf-s"
 126         select BR2_ARM_CPU_HAS_ARM
 127         select BR2_ARM_CPU_HAS_VFPV2
 128         select BR2_ARM_CPU_HAS_THUMB
 129         select BR2_ARM_CPU_ARMV6
 130         select BR2_ARCH_HAS_MMU_OPTIONAL
 131 config BR2_arm1176jz_s
 132         bool "arm1176jz-s"
 133         select BR2_ARM_CPU_HAS_ARM
 134         select BR2_ARM_CPU_HAS_THUMB
 135         select BR2_ARM_CPU_ARMV6
 136         select BR2_ARCH_HAS_MMU_OPTIONAL
 137 config BR2_arm1176jzf_s
 138         bool "arm1176jzf-s"
 139         select BR2_ARM_CPU_HAS_ARM
 140         select BR2_ARM_CPU_HAS_VFPV2
 141         select BR2_ARM_CPU_HAS_THUMB
 142         select BR2_ARM_CPU_ARMV6
 143         select BR2_ARCH_HAS_MMU_OPTIONAL
 144 config BR2_arm11mpcore
 145         bool "mpcore"
 146         select BR2_ARM_CPU_HAS_ARM
 147         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 148         select BR2_ARM_CPU_HAS_THUMB
 149         select BR2_ARM_CPU_ARMV6
 150         select BR2_ARCH_HAS_MMU_OPTIONAL
 151
 152 comment "armv7a cores"
 153 config BR2_cortex_a5
 154         bool "cortex-A5"
 155         select BR2_ARM_CPU_HAS_ARM
 156         select BR2_ARM_CPU_MAYBE_HAS_NEON
 157         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 158         select BR2_ARM_CPU_HAS_THUMB2
 159         select BR2_ARM_CPU_ARMV7A
 160         select BR2_ARCH_HAS_MMU_OPTIONAL
 161 config BR2_cortex_a7
 162         bool "cortex-A7"
 163         select BR2_ARM_CPU_HAS_ARM
 164         select BR2_ARM_CPU_HAS_NEON
 165         select BR2_ARM_CPU_HAS_VFPV4
 166         select BR2_ARM_CPU_HAS_THUMB2
 167         select BR2_ARM_CPU_ARMV7A
 168         select BR2_ARCH_HAS_MMU_OPTIONAL
 169 config BR2_cortex_a8
 170         bool "cortex-A8"
 171         select BR2_ARM_CPU_HAS_ARM
 172         select BR2_ARM_CPU_HAS_NEON
 173         select BR2_ARM_CPU_HAS_VFPV3
 174         select BR2_ARM_CPU_HAS_THUMB2
 175         select BR2_ARM_CPU_ARMV7A
 176         select BR2_ARCH_HAS_MMU_OPTIONAL
 177 config BR2_cortex_a9
 178         bool "cortex-A9"
 179         select BR2_ARM_CPU_HAS_ARM
 180         select BR2_ARM_CPU_MAYBE_HAS_NEON
 181         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 182         select BR2_ARM_CPU_HAS_THUMB2
 183         select BR2_ARM_CPU_ARMV7A
 184         select BR2_ARCH_HAS_MMU_OPTIONAL
 185 config BR2_cortex_a12
 186         bool "cortex-A12"
 187         select BR2_ARM_CPU_HAS_ARM
 188         select BR2_ARM_CPU_HAS_NEON
 189         select BR2_ARM_CPU_HAS_VFPV4
 190         select BR2_ARM_CPU_HAS_THUMB2
 191         select BR2_ARM_CPU_ARMV7A
 192         select BR2_ARCH_HAS_MMU_OPTIONAL
 193 config BR2_cortex_a15
 194         bool "cortex-A15"
 195         select BR2_ARM_CPU_HAS_ARM
 196         select BR2_ARM_CPU_HAS_NEON
 197         select BR2_ARM_CPU_HAS_VFPV4
 198         select BR2_ARM_CPU_HAS_THUMB2
 199         select BR2_ARM_CPU_ARMV7A
 200         select BR2_ARCH_HAS_MMU_OPTIONAL
 201 config BR2_cortex_a15_a7
 202         bool "cortex-A15/A7 big.LITTLE"
 203         select BR2_ARM_CPU_HAS_ARM
 204         select BR2_ARM_CPU_HAS_NEON
 205         select BR2_ARM_CPU_HAS_VFPV4
 206         select BR2_ARM_CPU_HAS_THUMB2
 207         select BR2_ARM_CPU_ARMV7A
 208         select BR2_ARCH_HAS_MMU_OPTIONAL
 209         select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 210 config BR2_cortex_a17
 211         bool "cortex-A17"
 212         select BR2_ARM_CPU_HAS_ARM
 213         select BR2_ARM_CPU_HAS_NEON
 214         select BR2_ARM_CPU_HAS_VFPV4
 215         select BR2_ARM_CPU_HAS_THUMB2
 216         select BR2_ARM_CPU_ARMV7A
 217         select BR2_ARCH_HAS_MMU_OPTIONAL
 218         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 219 config BR2_cortex_a17_a7
 220         bool "cortex-A17/A7 big.LITTLE"
 221         select BR2_ARM_CPU_HAS_ARM
 222         select BR2_ARM_CPU_HAS_NEON
 223         select BR2_ARM_CPU_HAS_VFPV4
 224         select BR2_ARM_CPU_HAS_THUMB2
 225         select BR2_ARM_CPU_ARMV7A
 226         select BR2_ARCH_HAS_MMU_OPTIONAL
 227         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 228 config BR2_pj4
 229         bool "pj4"
 230         select BR2_ARM_CPU_HAS_ARM
 231         select BR2_ARM_CPU_HAS_VFPV3
 232         select BR2_ARM_CPU_ARMV7A
 233         select BR2_ARCH_HAS_MMU_OPTIONAL
 234
 235 comment "armv7m cores"
 236 config BR2_cortex_m3
 237         bool "cortex-M3"
 238         select BR2_ARM_CPU_HAS_THUMB2
 239         select BR2_ARM_CPU_ARMV7M
 240 config BR2_cortex_m4
 241         bool "cortex-M4"
 242         select BR2_ARM_CPU_HAS_THUMB2
 243         select BR2_ARM_CPU_ARMV7M
 244 config BR2_cortex_m7
 245         bool "cortex-M7"
 246         select BR2_ARM_CPU_HAS_THUMB2
 247         select BR2_ARM_CPU_ARMV7M
 248         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 249 endif # !BR2_ARCH_IS_64
 250
 251 comment "armv8 cores"
 252 config BR2_cortex_a32
 253         bool "cortex-A32"
 254         depends on !BR2_ARCH_IS_64
 255         select BR2_ARM_CPU_HAS_ARM
 256         select BR2_ARM_CPU_HAS_NEON
 257         select BR2_ARM_CPU_HAS_THUMB2
 258         select BR2_ARM_CPU_HAS_FP_ARMV8
 259         select BR2_ARM_CPU_ARMV8A
 260         select BR2_ARCH_HAS_MMU_OPTIONAL
 261         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 262 config BR2_cortex_a35
 263         bool "cortex-A35"
 264         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 265         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 266         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 267         select BR2_ARM_CPU_HAS_FP_ARMV8
 268         select BR2_ARM_CPU_ARMV8A
 269         select BR2_ARCH_HAS_MMU_OPTIONAL
 270         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 271 config BR2_cortex_a53
 272         bool "cortex-A53"
 273         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 274         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 275         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 276         select BR2_ARM_CPU_HAS_FP_ARMV8
 277         select BR2_ARM_CPU_ARMV8A
 278         select BR2_ARCH_HAS_MMU_OPTIONAL
 279 config BR2_cortex_a57
 280         bool "cortex-A57"
 281         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 282         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 283         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 284         select BR2_ARM_CPU_HAS_FP_ARMV8
 285         select BR2_ARM_CPU_ARMV8A
 286         select BR2_ARCH_HAS_MMU_OPTIONAL
 287 config BR2_cortex_a57_a53
 288         bool "cortex-A57/A53 big.LITTLE"
 289         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 290         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 291         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 292         select BR2_ARM_CPU_HAS_FP_ARMV8
 293         select BR2_ARM_CPU_ARMV8A
 294         select BR2_ARCH_HAS_MMU_OPTIONAL
 295         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 296 config BR2_cortex_a72
 297         bool "cortex-A72"
 298         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 299         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 300         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 301         select BR2_ARM_CPU_HAS_FP_ARMV8
 302         select BR2_ARM_CPU_ARMV8A
 303         select BR2_ARCH_HAS_MMU_OPTIONAL
 304         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 305 config BR2_cortex_a72_a53
 306         bool "cortex-A72/A53 big.LITTLE"
 307         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 308         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 309         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 310         select BR2_ARM_CPU_HAS_FP_ARMV8
 311         select BR2_ARM_CPU_ARMV8A
 312         select BR2_ARCH_HAS_MMU_OPTIONAL
 313         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 314 config BR2_cortex_a73
 315         bool "cortex-A73"
 316         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 317         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 318         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 319         select BR2_ARM_CPU_HAS_FP_ARMV8
 320         select BR2_ARM_CPU_ARMV8A
 321         select BR2_ARCH_HAS_MMU_OPTIONAL
 322         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 323 config BR2_cortex_a73_a35
 324         bool "cortex-A73/A35 big.LITTLE"
 325         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 326         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 327         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 328         select BR2_ARM_CPU_HAS_FP_ARMV8
 329         select BR2_ARM_CPU_ARMV8A
 330         select BR2_ARCH_HAS_MMU_OPTIONAL
 331         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 332 config BR2_cortex_a73_a53
 333         bool "cortex-A73/A53 big.LITTLE"
 334         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 335         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 336         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 337         select BR2_ARM_CPU_HAS_FP_ARMV8
 338         select BR2_ARM_CPU_ARMV8A
 339         select BR2_ARCH_HAS_MMU_OPTIONAL
 340         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 341 config BR2_exynos_m1
 342         bool "exynos-m1"
 343         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 344         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 345         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 346         select BR2_ARM_CPU_HAS_FP_ARMV8
 347         select BR2_ARM_CPU_ARMV8A
 348         select BR2_ARCH_HAS_MMU_OPTIONAL
 349         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 350 config BR2_falkor
 351         bool "falkor"
 352         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 353         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 354         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 355         select BR2_ARM_CPU_HAS_FP_ARMV8
 356         select BR2_ARM_CPU_ARMV8A
 357         select BR2_ARCH_HAS_MMU_OPTIONAL
 358         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 359 config BR2_qdf24xx
 360         bool "qdf24xx"
 361         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 362         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 363         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 364         select BR2_ARM_CPU_HAS_FP_ARMV8
 365         select BR2_ARM_CPU_ARMV8A
 366         select BR2_ARCH_HAS_MMU_OPTIONAL
 367         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 368 if BR2_ARCH_IS_64
 369 config BR2_thunderx
 370         bool "thunderx"
 371         select BR2_ARM_CPU_HAS_FP_ARMV8
 372         select BR2_ARM_CPU_ARMV8A
 373         select BR2_ARCH_HAS_MMU_OPTIONAL
 374         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 375 config BR2_thunderxt81
 376         bool "thunderxt81"
 377         select BR2_ARM_CPU_HAS_FP_ARMV8
 378         select BR2_ARM_CPU_ARMV8A
 379         select BR2_ARCH_HAS_MMU_OPTIONAL
 380         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 381 config BR2_thunderxt83
 382         bool "thunderxt83"
 383         select BR2_ARM_CPU_HAS_FP_ARMV8
 384         select BR2_ARM_CPU_ARMV8A
 385         select BR2_ARCH_HAS_MMU_OPTIONAL
 386         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 387 config BR2_thunderxt88
 388         bool "thunderxt88"
 389         select BR2_ARM_CPU_HAS_FP_ARMV8
 390         select BR2_ARM_CPU_ARMV8A
 391         select BR2_ARCH_HAS_MMU_OPTIONAL
 392         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 393 config BR2_thunderxt88p1
 394         bool "thunderxt88p1"
 395         select BR2_ARM_CPU_HAS_FP_ARMV8
 396         select BR2_ARM_CPU_ARMV8A
 397         select BR2_ARCH_HAS_MMU_OPTIONAL
 398         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 399 endif # BR2_ARCH_IS_64
 400 config BR2_xgene1
 401         bool "xgene1"
 402         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 403         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 404         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 405         select BR2_ARM_CPU_HAS_FP_ARMV8
 406         select BR2_ARM_CPU_ARMV8A
 407         select BR2_ARCH_HAS_MMU_OPTIONAL
 408         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 409
 410 if BR2_ARCH_IS_64
 411 comment "armv8.1a cores"
 412 config BR2_thunderx2t99
 413         bool "thunderx2t99"
 414         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 415         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 416         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 417         select BR2_ARM_CPU_HAS_FP_ARMV8
 418         select BR2_ARM_CPU_ARMV8A
 419         select BR2_ARCH_HAS_MMU_OPTIONAL
 420         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 421 config BR2_thunderx2t99p1
 422         bool "thunderx2t99p1"
 423         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 424         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 425         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 426         select BR2_ARM_CPU_HAS_FP_ARMV8
 427         select BR2_ARM_CPU_ARMV8A
 428         select BR2_ARCH_HAS_MMU_OPTIONAL
 429         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 430 config BR2_vulcan
 431         bool "vulcan"
 432         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 433         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 434         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 435         select BR2_ARM_CPU_HAS_FP_ARMV8
 436         select BR2_ARM_CPU_ARMV8A
 437         select BR2_ARCH_HAS_MMU_OPTIONAL
 438         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 439 endif # BR2_ARCH_IS_64
 440 endchoice
 441
 442 config BR2_ARM_ENABLE_NEON
 443         bool "Enable NEON SIMD extension support"
 444         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 445         select BR2_ARM_CPU_HAS_NEON
 446         help
 447           For some CPU cores, the NEON SIMD extension is optional.
 448           Select this option if you are certain your particular
 449           implementation has NEON support and you want to use it.
 450
 451 config BR2_ARM_ENABLE_VFP
 452         bool "Enable VFP extension support"
 453         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
 454         select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
 455         select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
 456         select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
 457         help
 458           For some CPU cores, the VFP extension is optional. Select
 459           this option if you are certain your particular
 460           implementation has VFP support and you want to use it.
 461
 462 choice
 463         prompt "Target ABI"
 464         default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 465         default BR2_ARM_EABI
 466         depends on BR2_arm || BR2_armeb
 467         help
 468           Application Binary Interface to use. The Application Binary
 469           Interface describes the calling conventions (how arguments
 470           are passed to functions, how the return value is passed, how
 471           system calls are made, etc.).
 472
 473 config BR2_ARM_EABI
 474         bool "EABI"
 475         help
 476           The EABI is currently the standard ARM ABI, which is used in
 477           most projects. It supports both the 'soft' floating point
 478           model (in which floating point instructions are emulated in
 479           software) and the 'softfp' floating point model (in which
 480           floating point instructions are executed using an hardware
 481           floating point unit, but floating point arguments to
 482           functions are passed in integer registers).
 483
 484           The 'softfp' floating point model is link-compatible with
 485           the 'soft' floating point model, i.e you can link a library
 486           built 'soft' with some other code built 'softfp'.
 487
 488           However, passing the floating point arguments in integer
 489           registers is a bit inefficient, so if your ARM processor has
 490           a floating point unit, and you don't have pre-compiled
 491           'soft' or 'softfp' code, using the EABIhf ABI will provide
 492           better floating point performances.
 493
 494           If your processor does not have a floating point unit, then
 495           you must use this ABI.
 496
 497 config BR2_ARM_EABIHF
 498         bool "EABIhf"
 499         depends on BR2_ARM_CPU_HAS_VFPV2
 500         help
 501           The EABIhf is an extension of EABI which supports the 'hard'
 502           floating point model. This model uses the floating point
 503           unit to execute floating point instructions, and passes
 504           floating point arguments in floating point registers.
 505
 506           It is more efficient than EABI for floating point related
 507           workload. However, it does not allow to link against code
 508           that has been pre-built for the 'soft' or 'softfp' floating
 509           point models.
 510
 511           If your processor has a floating point unit, and you don't
 512           depend on existing pre-compiled code, this option is most
 513           likely the best choice.
 514
 515 endchoice
 516
 517 choice
 518         prompt "Floating point strategy"
 519         default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
 520         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 521         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 522         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 523         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 524
 525 config BR2_ARM_SOFT_FLOAT
 526         bool "Soft float"
 527         depends on BR2_ARM_EABI
 528         select BR2_SOFT_FLOAT
 529         help
 530           This option allows to use software emulated floating
 531           point. It should be used for ARM cores that do not include a
 532           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 533           example) or certain ARMv6 cores.
 534
 535 config BR2_ARM_FPU_VFPV2
 536         bool "VFPv2"
 537         depends on BR2_ARM_CPU_HAS_VFPV2
 538         help
 539           This option allows to use the VFPv2 floating point unit, as
 540           available in some ARMv5 processors (ARM926EJ-S) and some
 541           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 542           MPCore).
 543
 544           Note that this option is also safe to use for newer cores
 545           such as Cortex-A, because the VFPv3 and VFPv4 units are
 546           backward compatible with VFPv2.
 547
 548 config BR2_ARM_FPU_VFPV3
 549         bool "VFPv3"
 550         depends on BR2_ARM_CPU_HAS_VFPV3
 551         help
 552           This option allows to use the VFPv3 floating point unit, as
 553           available in some ARMv7 processors (Cortex-A{8, 9}). This
 554           option requires a VFPv3 unit that has 32 double-precision
 555           registers, which is not necessarily the case in all SOCs
 556           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 557           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 558
 559           Note that this option is also safe to use for newer cores
 560           that have a VFPv4 unit, because VFPv4 is backward compatible
 561           with VFPv3. They must of course also have 32
 562           double-precision registers.
 563
 564 config BR2_ARM_FPU_VFPV3D16
 565         bool "VFPv3-D16"
 566         depends on BR2_ARM_CPU_HAS_VFPV3
 567         help
 568           This option allows to use the VFPv3 floating point unit, as
 569           available in some ARMv7 processors (Cortex-A{8, 9}). This
 570           option requires a VFPv3 unit that has 16 double-precision
 571           registers, which is generally the case in all SOCs based on
 572           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 573           Cortex-A9. This is the safest option for those cores.
 574
 575           Note that this option is also safe to use for newer cores
 576           such that have a VFPv4 unit, because the VFPv4 is backward
 577           compatible with VFPv3.
 578
 579 config BR2_ARM_FPU_VFPV4
 580         bool "VFPv4"
 581         depends on BR2_ARM_CPU_HAS_VFPV4
 582         help
 583           This option allows to use the VFPv4 floating point unit, as
 584           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 585           15}). This option requires a VFPv4 unit that has 32
 586           double-precision registers, which is not necessarily the
 587           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 588           unsure, you should probably use VFPv4-D16 instead.
 589
 590           Note that if you want binary code that works on all ARMv7
 591           cores, including the earlier Cortex-A{8, 9}, you should
 592           instead select VFPv3.
 593
 594 config BR2_ARM_FPU_VFPV4D16
 595         bool "VFPv4-D16"
 596         depends on BR2_ARM_CPU_HAS_VFPV4
 597         help
 598           This option allows to use the VFPv4 floating point unit, as
 599           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 600           15}). This option requires a VFPv4 unit that has 16
 601           double-precision registers, which is always available on
 602           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 603           Cortex-A7.
 604
 605           Note that if you want binary code that works on all ARMv7
 606           cores, including the earlier Cortex-A{8, 9}, you should
 607           instead select VFPv3-D16.
 608
 609 config BR2_ARM_FPU_NEON
 610         bool "NEON"
 611         depends on BR2_ARM_CPU_HAS_NEON
 612         help
 613           This option allows to use the NEON SIMD unit, as available
 614           in some ARMv7 processors, as a floating-point unit. It
 615           should however be noted that using NEON for floating point
 616           operations doesn't provide a complete compatibility with the
 617           IEEE 754.
 618
 619 config BR2_ARM_FPU_NEON_VFPV4
 620         bool "NEON/VFPv4"
 621         depends on BR2_ARM_CPU_HAS_VFPV4
 622         depends on BR2_ARM_CPU_HAS_NEON
 623         help
 624           This option allows to use both the VFPv4 and the NEON SIMD
 625           units for floating point operations. Note that some ARMv7
 626           cores do not necessarily have VFPv4 and/or NEON support, for
 627           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 628           NEON is optional.
 629
 630 config BR2_ARM_FPU_FP_ARMV8
 631         bool "FP-ARMv8"
 632         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 633         help
 634           This option allows to use the ARMv8 floating point unit.
 635
 636 config BR2_ARM_FPU_NEON_FP_ARMV8
 637         bool "NEON/FP-ARMv8"
 638         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 639         depends on BR2_ARM_CPU_HAS_NEON
 640         help
 641           This option allows to use both the ARMv8 floating point unit
 642           and the NEON SIMD unit for floating point operations.
 643
 644 endchoice
 645
 646 choice
 647         prompt "ARM instruction set"
 648         depends on BR2_arm || BR2_armeb
 649
 650 config BR2_ARM_INSTRUCTIONS_ARM
 651         bool "ARM"
 652         depends on BR2_ARM_CPU_HAS_ARM
 653         help
 654           This option instructs the compiler to generate regular ARM
 655           instructions, that are all 32 bits wide.
 656
 657 config BR2_ARM_INSTRUCTIONS_THUMB
 658         bool "Thumb"
 659         depends on BR2_ARM_CPU_HAS_THUMB
 660         # Thumb-1 and VFP are not compatible
 661         depends on BR2_ARM_SOFT_FLOAT
 662         help
 663           This option instructions the compiler to generate Thumb
 664           instructions, which allows to mix 16 bits instructions and
 665           32 bits instructions. This generally provides a much smaller
 666           compiled binary size.
 667
 668 comment "Thumb1 is not compatible with VFP"
 669         depends on BR2_ARM_CPU_HAS_THUMB
 670         depends on !BR2_ARM_SOFT_FLOAT
 671
 672 config BR2_ARM_INSTRUCTIONS_THUMB2
 673         bool "Thumb2"
 674         depends on BR2_ARM_CPU_HAS_THUMB2
 675         help
 676           This option instructions the compiler to generate Thumb2
 677           instructions, which allows to mix 16 bits instructions and
 678           32 bits instructions. This generally provides a much smaller
 679           compiled binary size.
 680
 681 endchoice
 682
 683 config BR2_ARCH
 684         default "arm"           if BR2_arm
 685         default "armeb"         if BR2_armeb
 686         default "aarch64"       if BR2_aarch64
 687         default "aarch64_be"    if BR2_aarch64_be
 688
 689 config BR2_ENDIAN
 690         default "LITTLE" if (BR2_arm || BR2_aarch64)
 691         default "BIG"    if (BR2_armeb || BR2_aarch64_be)
 692
 693 config BR2_GCC_TARGET_CPU
 694         # armv4
 695         default "arm920t"       if BR2_arm920t
 696         default "arm922t"       if BR2_arm922t
 697         default "fa526"         if BR2_fa526
 698         default "strongarm"     if BR2_strongarm
 699         # armv5
 700         default "arm926ej-s"    if BR2_arm926t
 701         default "iwmmxt"        if BR2_iwmmxt
 702         default "xscale"        if BR2_xscale
 703         # armv6
 704         default "arm1136j-s"    if BR2_arm1136j_s
 705         default "arm1136jf-s"   if BR2_arm1136jf_s
 706         default "arm1176jz-s"   if BR2_arm1176jz_s
 707         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 708         default "mpcore"        if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 709         default "mpcorenovfp"   if BR2_arm11mpcore
 710         # armv7a
 711         default "cortex-a5"     if BR2_cortex_a5
 712         default "cortex-a7"     if BR2_cortex_a7
 713         default "cortex-a8"     if BR2_cortex_a8
 714         default "cortex-a9"     if BR2_cortex_a9
 715         default "cortex-a12"    if BR2_cortex_a12
 716         default "cortex-a15"    if BR2_cortex_a15
 717         default "cortex-a15.cortex-a7"  if BR2_cortex_a15_a7
 718         default "cortex-a17"    if BR2_cortex_a17
 719         default "cortex-a17.cortex-a7"  if BR2_cortex_a17_a7
 720         default "marvell-pj4"   if BR2_pj4
 721         # armv7m
 722         default "cortex-m3"     if BR2_cortex_m3
 723         default "cortex-m4"     if BR2_cortex_m4
 724         default "cortex-m7"     if BR2_cortex_m7
 725         # armv8a
 726         default "cortex-a32"    if BR2_cortex_a32
 727         default "cortex-a35"    if BR2_cortex_a35
 728         default "cortex-a53"    if BR2_cortex_a53
 729         default "cortex-a57"    if BR2_cortex_a57
 730         default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
 731         default "cortex-a72"    if BR2_cortex_a72
 732         default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
 733         default "cortex-a73"    if BR2_cortex_a73
 734         default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
 735         default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
 736         default "exynos-m1"     if BR2_exynos_m1
 737         default "falkor"        if BR2_falkor
 738         default "qdf24xx"       if BR2_qdf24xx
 739         default "thunderx"      if BR2_thunderx
 740         default "thunderxt81"   if BR2_thunderxt81
 741         default "thunderxt83"   if BR2_thunderxt83
 742         default "thunderxt88"   if BR2_thunderxt88
 743         default "thunderxt88p1" if BR2_thunderxt88p1
 744         default "xgene1"        if BR2_xgene1
 745         # armv8.1a
 746         default "thunderx2t99"  if BR2_thunderx2t99
 747         default "thunderx2t99p1"        if BR2_thunderx2t99p1
 748         default "vulcan"        if BR2_vulcan
 749
 750 config BR2_GCC_TARGET_ABI
 751         default "aapcs-linux"   if BR2_arm || BR2_armeb
 752         default "lp64"          if BR2_aarch64 || BR2_aarch64_be
 753
 754 config BR2_GCC_TARGET_FPU
 755         default "vfp"           if BR2_ARM_FPU_VFPV2
 756         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 757         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 758         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 759         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 760         default "neon"          if BR2_ARM_FPU_NEON
 761         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 762         default "fp-armv8"      if BR2_ARM_FPU_FP_ARMV8
 763         default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
 764         depends on BR2_arm || BR2_armeb
 765
 766 config BR2_GCC_TARGET_FLOAT_ABI
 767         default "soft"          if BR2_ARM_SOFT_FLOAT
 768         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 769         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 770
 771 config BR2_GCC_TARGET_MODE
 772         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 773         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
 774
 775 config BR2_READELF_ARCH_NAME
 776         default "ARM"           if BR2_arm || BR2_armeb
 777         default "AArch64"       if BR2_aarch64 || BR2_aarch64_be