ARM: footbridge: nw_gpio_lock is raw_spin_lock

[can-eth-gw-linux.git] / drivers / char / nwflash.c

diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
index d45c3345b4af4dae61f6458b5e14bc490c2a084e..04e2a9491fca2c63d14d95006e7e52d9a9db1a32 100644 (file)
--- a/drivers/char/nwflash.c
+++ b/drivers/char/nwflash.c
@@ -617,9 +617,9 @@ static void kick_open(void)
         * we want to write a bit pattern XXX1 to Xilinx to enable
         * the write gate, which will be open for about the next 2ms.
         */
-       spin_lock_irqsave(&nw_gpio_lock, flags);
+       raw_spin_lock_irqsave(&nw_gpio_lock, flags);
        nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
-       spin_unlock_irqrestore(&nw_gpio_lock, flags);
+       raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 
        /*
         * let the ISA bus to catch on...