ARM: tegra: dts: add slink controller dt entry

[can-eth-gw-linux.git] / arch / arm / boot / dts / tegra20.dtsi

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 67a6cd910b9612d0a3aa7d206f1570a709a1226e..514ee2849420c99cb3f98e0cdb40bc5ee6de9ed6 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,15 @@
        compatible = "nvidia,tegra20";
        interrupt-parent = <&intc>;
 
+       cache-controller@50043000 {
+               compatible = "arm,pl310-cache";
+               reg = <0x50043000 0x1000>;
+               arm,data-latency = <5 5 2>;
+               arm,tag-latency = <4 4 2>;
+               cache-unified;
+               cache-level = <2>;
+       };
+
        intc: interrupt-controller {
                compatible = "arm,cortex-a9-gic";
                reg = <0x50041000 0x1000
@@ -165,12 +174,52 @@
                status = "disabled";
        };
 
+       spi@7000d400 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d400 0x200>;
+               interrupts = <0 59 0x04>;
+               nvidia,dma-request-selector = <&apbdma 15>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000d600 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d600 0x200>;
+               interrupts = <0 82 0x04>;
+               nvidia,dma-request-selector = <&apbdma 16>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000d800 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000d480 0x200>;
+               interrupts = <0 83 0x04>;
+               nvidia,dma-request-selector = <&apbdma 17>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi@7000da00 {
+               compatible = "nvidia,tegra20-slink";
+               reg = <0x7000da00 0x200>;
+               interrupts = <0 93 0x04>;
+               nvidia,dma-request-selector = <&apbdma 18>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        pmc {
                compatible = "nvidia,tegra20-pmc";
                reg = <0x7000e400 0x400>;
        };
 
-       memory-controller@0x7000f000 {
+       memory-controller@7000f000 {
                compatible = "nvidia,tegra20-mc";
                reg = <0x7000f000 0x024
                       0x7000f03c 0x3c4>;
@@ -183,7 +232,7 @@
                       0x58000000 0x02000000>;  /* GART aperture */
        };
 
-       memory-controller@0x7000f400 {
+       memory-controller@7000f400 {
                compatible = "nvidia,tegra20-emc";
                reg = <0x7000f400 0x200>;
                #address-cells = <1>;