Merge branch 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux...

[can-eth-gw-linux.git] / arch / arm / mach-dove / pcie.c

diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index b3724414fd1a959cba90ec0f5c4b76cc6e98a4a1..bb15b26041cb7d6bd13a5ca4d5532cb66632e2cc 100644 (file)
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -26,9 +26,8 @@ struct pcie_port {
        u8                      root_bus_nr;
        void __iomem            *base;
        spinlock_t              conf_lock;
-       char                    io_space_name[16];
        char                    mem_space_name[16];
-       struct resource         res[2];
+       struct resource         res;
 };
 
 static struct pcie_port pcie_port[2];
@@ -53,24 +52,10 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
 
        orion_pcie_setup(pp->base);
 
-       /*
-        * IORESOURCE_IO
-        */
-       snprintf(pp->io_space_name, sizeof(pp->io_space_name),
-                "PCIe %d I/O", pp->index);
-       pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0;
-       pp->res[0].name = pp->io_space_name;
-       if (pp->index == 0) {
-               pp->res[0].start = DOVE_PCIE0_IO_PHYS_BASE;
-               pp->res[0].end = pp->res[0].start + DOVE_PCIE0_IO_SIZE - 1;
-       } else {
-               pp->res[0].start = DOVE_PCIE1_IO_PHYS_BASE;
-               pp->res[0].end = pp->res[0].start + DOVE_PCIE1_IO_SIZE - 1;
-       }
-       pp->res[0].flags = IORESOURCE_IO;
-       if (request_resource(&ioport_resource, &pp->res[0]))
-               panic("Request PCIe IO resource failed\n");
-       pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);
+       if (pp->index == 0)
+               pci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE0_IO_PHYS_BASE);
+       else
+               pci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE1_IO_PHYS_BASE);
 
        /*
         * IORESOURCE_MEM
@@ -78,18 +63,18 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
        snprintf(pp->mem_space_name, sizeof(pp->mem_space_name),
                 "PCIe %d MEM", pp->index);
        pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0;
-       pp->res[1].name = pp->mem_space_name;
+       pp->res.name = pp->mem_space_name;
        if (pp->index == 0) {
-               pp->res[1].start = DOVE_PCIE0_MEM_PHYS_BASE;
-               pp->res[1].end = pp->res[1].start + DOVE_PCIE0_MEM_SIZE - 1;
+               pp->res.start = DOVE_PCIE0_MEM_PHYS_BASE;
+               pp->res.end = pp->res.start + DOVE_PCIE0_MEM_SIZE - 1;
        } else {
-               pp->res[1].start = DOVE_PCIE1_MEM_PHYS_BASE;
-               pp->res[1].end = pp->res[1].start + DOVE_PCIE1_MEM_SIZE - 1;
+               pp->res.start = DOVE_PCIE1_MEM_PHYS_BASE;
+               pp->res.end = pp->res.start + DOVE_PCIE1_MEM_SIZE - 1;
        }
-       pp->res[1].flags = IORESOURCE_MEM;
-       if (request_resource(&iomem_resource, &pp->res[1]))
+       pp->res.flags = IORESOURCE_MEM;
+       if (request_resource(&iomem_resource, &pp->res))
                panic("Request PCIe Memory resource failed\n");
-       pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);
+       pci_add_resource_offset(&sys->resources, &pp->res, sys->mem_offset);
 
        return 1;
 }
@@ -210,7 +195,7 @@ static void __init add_pcie_port(int index, void __iomem *base)
                pp->root_bus_nr = -1;
                pp->base = base;
                spin_lock_init(&pp->conf_lock);
-               memset(pp->res, 0, sizeof(pp->res));
+               memset(&pp->res, 0, sizeof(pp->res));
        } else {
                printk(KERN_INFO "link down, ignoring\n");
        }