Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[can-eth-gw-linux.git] / arch / arm / mach-exynos / clock-exynos5.c

diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index c44ca1ee1b8d0196de2ac413bad5af226bc83bc9..7652f5d78a56664dba722ec0dea19e51d0dd3937 100644 (file)
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -196,6 +196,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
 }
 
+static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
+{
+       return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
+}
+
 /* Core list of CMU_CPU side */
 
 static struct clksrc_clk exynos5_clk_mout_apll = {
@@ -292,7 +297,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = {
        .nr_sources     = ARRAY_SIZE(exynos5_clk_src_mpll_list),
 };
 
-struct clksrc_clk exynos5_clk_mout_mpll = {
+static struct clksrc_clk exynos5_clk_mout_mpll = {
        .clk = {
                .name           = "mout_mpll",
        },
@@ -467,12 +472,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = {
 
 /* Core list of CMU_TOP side */
 
-struct clk *exynos5_clkset_aclk_top_list[] = {
+static struct clk *exynos5_clkset_aclk_top_list[] = {
        [0] = &exynos5_clk_mout_mpll_user.clk,
        [1] = &exynos5_clk_mout_bpll_user.clk,
 };
 
-struct clksrc_sources exynos5_clkset_aclk = {
+static struct clksrc_sources exynos5_clkset_aclk = {
        .sources        = exynos5_clkset_aclk_top_list,
        .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
 };
@@ -486,12 +491,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = {
        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
 };
 
-struct clk *exynos5_clkset_aclk_333_166_list[] = {
+static struct clk *exynos5_clkset_aclk_333_166_list[] = {
        [0] = &exynos5_clk_mout_cpll.clk,
        [1] = &exynos5_clk_mout_mpll_user.clk,
 };
 
-struct clksrc_sources exynos5_clkset_aclk_333_166 = {
+static struct clksrc_sources exynos5_clkset_aclk_333_166 = {
        .sources        = exynos5_clkset_aclk_333_166_list,
        .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
 };
@@ -615,6 +620,11 @@ static struct clk exynos5_init_clocks_off[] = {
                .parent         = &exynos5_clk_aclk_66.clk,
                .enable         = exynos5_clk_ip_peric_ctrl,
                .ctrlbit        = (1 << 24),
+       }, {
+               .name           = "tmu_apbif",
+               .parent         = &exynos5_clk_aclk_66.clk,
+               .enable         = exynos5_clk_ip_peris_ctrl,
+               .ctrlbit        = (1 << 21),
        }, {
                .name           = "rtc",
                .parent         = &exynos5_clk_aclk_66.clk,
@@ -664,17 +674,22 @@ static struct clk exynos5_init_clocks_off[] = {
                .ctrlbit        = (1 << 25),
        }, {
                .name           = "mfc",
-               .devname        = "s5p-mfc",
+               .devname        = "s5p-mfc-v6",
                .enable         = exynos5_clk_ip_mfc_ctrl,
                .ctrlbit        = (1 << 0),
        }, {
                .name           = "hdmi",
-               .devname        = "exynos4-hdmi",
+               .devname        = "exynos5-hdmi",
                .enable         = exynos5_clk_ip_disp1_ctrl,
                .ctrlbit        = (1 << 6),
+       }, {
+               .name           = "hdmiphy",
+               .devname        = "exynos5-hdmi",
+               .enable         = exynos5_clk_hdmiphy_ctrl,
+               .ctrlbit        = (1 << 0),
        }, {
                .name           = "mixer",
-               .devname        = "s5p-mixer",
+               .devname        = "exynos5-mixer",
                .enable         = exynos5_clk_ip_disp1_ctrl,
                .ctrlbit        = (1 << 5),
        }, {
@@ -966,7 +981,7 @@ static struct clk exynos5_clk_fimd1 = {
        .ctrlbit        = (1 << 0),
 };
 
-struct clk *exynos5_clkset_group_list[] = {
+static struct clk *exynos5_clkset_group_list[] = {
        [0] = &clk_ext_xtal_mux,
        [1] = NULL,
        [2] = &exynos5_clk_sclk_hdmi24m,
@@ -979,7 +994,7 @@ struct clk *exynos5_clkset_group_list[] = {
        [9] = &exynos5_clk_mout_cpll.clk,
 };
 
-struct clksrc_sources exynos5_clkset_group = {
+static struct clksrc_sources exynos5_clkset_group = {
        .sources        = exynos5_clkset_group_list,
        .nr_sources     = ARRAY_SIZE(exynos5_clkset_group_list),
 };
@@ -1195,7 +1210,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
        .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
 };
 
-struct clksrc_clk exynos5_clk_sclk_fimd1 = {
+static struct clksrc_clk exynos5_clk_sclk_fimd1 = {
        .clk    = {
                .name           = "sclk_fimd",
                .devname        = "exynos5-fb.1",
@@ -1476,7 +1491,7 @@ static void exynos5_clock_resume(void)
 #define exynos5_clock_resume NULL
 #endif
 
-struct syscore_ops exynos5_clock_syscore_ops = {
+static struct syscore_ops exynos5_clock_syscore_ops = {
        .suspend        = exynos5_clock_suspend,
        .resume         = exynos5_clock_resume,
 };