]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/blobdiff - arch/arm/boot/dts/imx6q.dtsi
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
[can-eth-gw-linux.git] / arch / arm / boot / dts / imx6q.dtsi
index 3290e61be3e1c185e697ee406a22b5b2808db5b0..cce1d874c7a5147b222371745a53924a98aee422 100644 (file)
                        };
 
                        pwm@02080000 { /* PWM1 */
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x02080000 0x4000>;
                                interrupts = <0 83 0x04>;
+                               clocks = <&clks 62>, <&clks 145>;
+                               clock-names = "ipg", "per";
                        };
 
                        pwm@02084000 { /* PWM2 */
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x02084000 0x4000>;
                                interrupts = <0 84 0x04>;
+                               clocks = <&clks 62>, <&clks 146>;
+                               clock-names = "ipg", "per";
                        };
 
                        pwm@02088000 { /* PWM3 */
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x02088000 0x4000>;
                                interrupts = <0 85 0x04>;
+                               clocks = <&clks 62>, <&clks 147>;
+                               clock-names = "ipg", "per";
                        };
 
                        pwm@0208c000 { /* PWM4 */
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x0208c000 0x4000>;
                                interrupts = <0 86 0x04>;
+                               clocks = <&clks 62>, <&clks 148>;
+                               clock-names = "ipg", "per";
                        };
 
                        flexcan@02090000 { /* CAN1 */
                        i2c@021a0000 { /* I2C1 */
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                               compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                reg = <0x021a0000 0x4000>;
                                interrupts = <0 36 0x04>;
                                clocks = <&clks 125>;
                        i2c@021a4000 { /* I2C2 */
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                               compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                reg = <0x021a4000 0x4000>;
                                interrupts = <0 37 0x04>;
                                clocks = <&clks 126>;
                        i2c@021a8000 { /* I2C3 */
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                               compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                reg = <0x021a8000 0x4000>;
                                interrupts = <0 38 0x04>;
                                clocks = <&clks 127>;
                                status = "disabled";
                        };
                };
+
+               ipu1: ipu@02400000 {
+                       #crtc-cells = <1>;
+                       compatible = "fsl,imx6q-ipu";
+                       reg = <0x02400000 0x400000>;
+                       interrupts = <0 6 0x4 0 5 0x4>;
+                       clocks = <&clks 130>, <&clks 131>, <&clks 132>;
+                       clock-names = "bus", "di0", "di1";
+               };
+
+               ipu2: ipu@02800000 {
+                       #crtc-cells = <1>;
+                       compatible = "fsl,imx6q-ipu";
+                       reg = <0x02800000 0x400000>;
+                       interrupts = <0 8 0x4 0 7 0x4>;
+                       clocks = <&clks 133>, <&clks 134>, <&clks 137>;
+                       clock-names = "bus", "di0", "di1";
+               };
        };
 };