sound/soc/omap/omap-mcpdm.c

   1 /*
   2  * omap-mcpdm.c  --  OMAP ALSA SoC DAI driver using McPDM port
   3  *
   4  * Copyright (C) 2009 - 2011 Texas Instruments
   5  *
   6  * Author: Misael Lopez Cruz <misael.lopez@ti.com>
   7  * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
   8  *          Margarita Olaya <magi.olaya@ti.com>
   9  *          Peter Ujfalusi <peter.ujfalusi@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/of_device.h>
  37
  38 #include <sound/core.h>
  39 #include <sound/pcm.h>
  40 #include <sound/pcm_params.h>
  41 #include <sound/soc.h>
  42
  43 #include <plat/omap_hwmod.h>
  44 #include "omap-mcpdm.h"
  45 #include "omap-pcm.h"
  46
  47 struct omap_mcpdm {
  48         struct device *dev;
  49         unsigned long phys_base;
  50         void __iomem *io_base;
  51         int irq;
  52
  53         struct mutex mutex;
  54
  55         /* channel data */
  56         u32 dn_channels;
  57         u32 up_channels;
  58
  59         /* McPDM FIFO thresholds */
  60         u32 dn_threshold;
  61         u32 up_threshold;
  62
  63         /* McPDM dn offsets for rx1, and 2 channels */
  64         u32 dn_rx_offset;
  65 };
  66
  67 /*
  68  * Stream DMA parameters
  69  */
  70 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  71         {
  72                 .name = "Audio playback",
  73         },
  74         {
  75                 .name = "Audio capture",
  76         },
  77 };
  78
  79 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  80 {
  81         __raw_writel(val, mcpdm->io_base + reg);
  82 }
  83
  84 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  85 {
  86         return __raw_readl(mcpdm->io_base + reg);
  87 }
  88
  89 #ifdef DEBUG
  90 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
  91 {
  92         dev_dbg(mcpdm->dev, "***********************\n");
  93         dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
  94                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
  95         dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
  96                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
  97         dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
  98                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
  99         dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
 100                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
 101         dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
 102                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
 103         dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
 104                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
 105         dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
 106                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
 107         dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
 108                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
 109         dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
 110                         omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
 111         dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
 112                         omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
 113         dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
 114                         omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
 115         dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
 116                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
 117         dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
 118                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
 119         dev_dbg(mcpdm->dev, "***********************\n");
 120 }
 121 #else
 122 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
 123 #endif
 124
 125 /*
 126  * Enables the transfer through the PDM interface to/from the Phoenix
 127  * codec by enabling the corresponding UP or DN channels.
 128  */
 129 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
 130 {
 131         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 132
 133         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 134         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 135
 136         ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
 137         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 138
 139         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 140         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 141 }
 142
 143 /*
 144  * Disables the transfer through the PDM interface to/from the Phoenix
 145  * codec by disabling the corresponding UP or DN channels.
 146  */
 147 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
 148 {
 149         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 150
 151         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 152         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 153
 154         ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
 155         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 156
 157         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 158         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 159
 160 }
 161
 162 /*
 163  * Is the physical McPDM interface active.
 164  */
 165 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
 166 {
 167         return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
 168                                         (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
 169 }
 170
 171 /*
 172  * Configures McPDM uplink, and downlink for audio.
 173  * This function should be called before omap_mcpdm_start.
 174  */
 175 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
 176 {
 177         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
 178                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
 179                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 180
 181         /* Enable DN RX1/2 offset cancellation feature, if configured */
 182         if (mcpdm->dn_rx_offset) {
 183                 u32 dn_offset = mcpdm->dn_rx_offset;
 184
 185                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 186                 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
 187                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 188         }
 189
 190         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
 191         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
 192
 193         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
 194                         MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
 195 }
 196
 197 /*
 198  * Cleans McPDM uplink, and downlink configuration.
 199  * This function should be called when the stream is closed.
 200  */
 201 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
 202 {
 203         /* Disable irq request generation for downlink */
 204         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 205                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
 206
 207         /* Disable DMA request generation for downlink */
 208         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
 209
 210         /* Disable irq request generation for uplink */
 211         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 212                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 213
 214         /* Disable DMA request generation for uplink */
 215         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
 216
 217         /* Disable RX1/2 offset cancellation */
 218         if (mcpdm->dn_rx_offset)
 219                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
 220 }
 221
 222 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 223 {
 224         struct omap_mcpdm *mcpdm = dev_id;
 225         int irq_status;
 226
 227         irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
 228
 229         /* Acknowledge irq event */
 230         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
 231
 232         if (irq_status & MCPDM_DN_IRQ_FULL)
 233                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
 234
 235         if (irq_status & MCPDM_DN_IRQ_EMPTY)
 236                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
 237
 238         if (irq_status & MCPDM_DN_IRQ)
 239                 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
 240
 241         if (irq_status & MCPDM_UP_IRQ_FULL)
 242                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
 243
 244         if (irq_status & MCPDM_UP_IRQ_EMPTY)
 245                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
 246
 247         if (irq_status & MCPDM_UP_IRQ)
 248                 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
 249
 250         return IRQ_HANDLED;
 251 }
 252
 253 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
 254                                   struct snd_soc_dai *dai)
 255 {
 256         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 257
 258         mutex_lock(&mcpdm->mutex);
 259
 260         if (!dai->active) {
 261                 /* Enable watch dog for ES above ES 1.0 to avoid saturation */
 262                 if (omap_rev() != OMAP4430_REV_ES1_0) {
 263                         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 264
 265                         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
 266                                          ctrl | MCPDM_WD_EN);
 267                 }
 268                 omap_mcpdm_open_streams(mcpdm);
 269         }
 270
 271         mutex_unlock(&mcpdm->mutex);
 272
 273         return 0;
 274 }
 275
 276 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
 277                                   struct snd_soc_dai *dai)
 278 {
 279         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 280
 281         mutex_lock(&mcpdm->mutex);
 282
 283         if (!dai->active) {
 284                 if (omap_mcpdm_active(mcpdm)) {
 285                         omap_mcpdm_stop(mcpdm);
 286                         omap_mcpdm_close_streams(mcpdm);
 287                 }
 288         }
 289
 290         mutex_unlock(&mcpdm->mutex);
 291 }
 292
 293 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
 294                                     struct snd_pcm_hw_params *params,
 295                                     struct snd_soc_dai *dai)
 296 {
 297         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 298         int stream = substream->stream;
 299         struct omap_pcm_dma_data *dma_data;
 300         int channels;
 301         int link_mask = 0;
 302
 303         channels = params_channels(params);
 304         switch (channels) {
 305         case 5:
 306                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 307                         /* up to 3 channels for capture */
 308                         return -EINVAL;
 309                 link_mask |= 1 << 4;
 310         case 4:
 311                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 312                         /* up to 3 channels for capture */
 313                         return -EINVAL;
 314                 link_mask |= 1 << 3;
 315         case 3:
 316                 link_mask |= 1 << 2;
 317         case 2:
 318                 link_mask |= 1 << 1;
 319         case 1:
 320                 link_mask |= 1 << 0;
 321                 break;
 322         default:
 323                 /* unsupported number of channels */
 324                 return -EINVAL;
 325         }
 326
 327         dma_data = &omap_mcpdm_dai_dma_params[stream];
 328
 329         /* Configure McPDM channels, and DMA packet size */
 330         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 331                 mcpdm->dn_channels = link_mask << 3;
 332                 dma_data->packet_size =
 333                         (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
 334         } else {
 335                 mcpdm->up_channels = link_mask << 0;
 336                 dma_data->packet_size = mcpdm->up_threshold * channels;
 337         }
 338
 339         snd_soc_dai_set_dma_data(dai, substream, dma_data);
 340
 341         return 0;
 342 }
 343
 344 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
 345                                   struct snd_soc_dai *dai)
 346 {
 347         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 348
 349         if (!omap_mcpdm_active(mcpdm)) {
 350                 omap_mcpdm_start(mcpdm);
 351                 omap_mcpdm_reg_dump(mcpdm);
 352         }
 353
 354         return 0;
 355 }
 356
 357 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
 358         .startup        = omap_mcpdm_dai_startup,
 359         .shutdown       = omap_mcpdm_dai_shutdown,
 360         .hw_params      = omap_mcpdm_dai_hw_params,
 361         .prepare        = omap_mcpdm_prepare,
 362 };
 363
 364 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
 365 {
 366         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 367         int ret;
 368
 369         pm_runtime_enable(mcpdm->dev);
 370
 371         /* Disable lines while request is ongoing */
 372         pm_runtime_get_sync(mcpdm->dev);
 373         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
 374
 375         ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
 376                                 0, "McPDM", (void *)mcpdm);
 377
 378         pm_runtime_put_sync(mcpdm->dev);
 379
 380         if (ret) {
 381                 dev_err(mcpdm->dev, "Request for IRQ failed\n");
 382                 pm_runtime_disable(mcpdm->dev);
 383         }
 384
 385         /* Configure McPDM threshold values */
 386         mcpdm->dn_threshold = 2;
 387         mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
 388         return ret;
 389 }
 390
 391 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
 392 {
 393         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 394
 395         free_irq(mcpdm->irq, (void *)mcpdm);
 396         pm_runtime_disable(mcpdm->dev);
 397
 398         return 0;
 399 }
 400
 401 #define OMAP_MCPDM_RATES        (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 402 #define OMAP_MCPDM_FORMATS      SNDRV_PCM_FMTBIT_S32_LE
 403
 404 static struct snd_soc_dai_driver omap_mcpdm_dai = {
 405         .probe = omap_mcpdm_probe,
 406         .remove = omap_mcpdm_remove,
 407         .probe_order = SND_SOC_COMP_ORDER_LATE,
 408         .remove_order = SND_SOC_COMP_ORDER_EARLY,
 409         .playback = {
 410                 .channels_min = 1,
 411                 .channels_max = 5,
 412                 .rates = OMAP_MCPDM_RATES,
 413                 .formats = OMAP_MCPDM_FORMATS,
 414                 .sig_bits = 24,
 415         },
 416         .capture = {
 417                 .channels_min = 1,
 418                 .channels_max = 3,
 419                 .rates = OMAP_MCPDM_RATES,
 420                 .formats = OMAP_MCPDM_FORMATS,
 421                 .sig_bits = 24,
 422         },
 423         .ops = &omap_mcpdm_dai_ops,
 424 };
 425
 426 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
 427                                     u8 rx1, u8 rx2)
 428 {
 429         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
 430
 431         mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
 432 }
 433 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
 434
 435 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
 436 {
 437         struct omap_mcpdm *mcpdm;
 438         struct resource *res;
 439
 440         mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
 441         if (!mcpdm)
 442                 return -ENOMEM;
 443
 444         platform_set_drvdata(pdev, mcpdm);
 445
 446         mutex_init(&mcpdm->mutex);
 447
 448         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
 449         if (res == NULL)
 450                 return -ENOMEM;
 451
 452         omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
 453         omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
 454
 455         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 456         if (res == NULL)
 457                 return -ENOMEM;
 458
 459         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
 460         if (!res)
 461                 return -ENODEV;
 462
 463         omap_mcpdm_dai_dma_params[0].dma_req = res->start;
 464
 465         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
 466         if (!res)
 467                 return -ENODEV;
 468
 469         omap_mcpdm_dai_dma_params[1].dma_req = res->start;
 470
 471         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
 472         if (res == NULL)
 473                 return -ENOMEM;
 474
 475         if (!devm_request_mem_region(&pdev->dev, res->start,
 476                                      resource_size(res), "McPDM"))
 477                 return -EBUSY;
 478
 479         mcpdm->io_base = devm_ioremap(&pdev->dev, res->start,
 480                                       resource_size(res));
 481         if (!mcpdm->io_base)
 482                 return -ENOMEM;
 483
 484         mcpdm->irq = platform_get_irq(pdev, 0);
 485         if (mcpdm->irq < 0)
 486                 return mcpdm->irq;
 487
 488         mcpdm->dev = &pdev->dev;
 489
 490         return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
 491 }
 492
 493 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
 494 {
 495         snd_soc_unregister_dai(&pdev->dev);
 496         return 0;
 497 }
 498
 499 static const struct of_device_id omap_mcpdm_of_match[] = {
 500         { .compatible = "ti,omap4-mcpdm", },
 501         { }
 502 };
 503 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
 504
 505 static struct platform_driver asoc_mcpdm_driver = {
 506         .driver = {
 507                 .name   = "omap-mcpdm",
 508                 .owner  = THIS_MODULE,
 509                 .of_match_table = omap_mcpdm_of_match,
 510         },
 511
 512         .probe  = asoc_mcpdm_probe,
 513         .remove = __devexit_p(asoc_mcpdm_remove),
 514 };
 515
 516 module_platform_driver(asoc_mcpdm_driver);
 517
 518 MODULE_ALIAS("platform:omap-mcpdm");
 519 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
 520 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
 521 MODULE_LICENSE("GPL");