arch/arm/mach-omap2/io.c

   1 /*
   2  * linux/arch/arm/mach-omap2/io.c
   3  *
   4  * OMAP2 I/O mapping code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Copyright (C) 2007-2009 Texas Instruments
   8  *
   9  * Author:
  10  *      Juha Yrjola <juha.yrjola@nokia.com>
  11  *      Syed Khasim <x0khasim@ti.com>
  12  *
  13  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/clk.h>
  24
  25 #include <asm/tlb.h>
  26 #include <asm/mach/map.h>
  27
  28 #include <plat-omap/dma-omap.h>
  29
  30 #include "../plat-omap/sram.h"
  31 #include <plat/prcm.h>
  32
  33 #include "omap_hwmod.h"
  34 #include "soc.h"
  35 #include "iomap.h"
  36 #include "voltage.h"
  37 #include "powerdomain.h"
  38 #include "clockdomain.h"
  39 #include "common.h"
  40 #include "clock.h"
  41 #include "clock2xxx.h"
  42 #include "clock3xxx.h"
  43 #include "clock44xx.h"
  44 #include "omap-pm.h"
  45 #include "sdrc.h"
  46 #include "control.h"
  47 #include "serial.h"
  48 #include "cm2xxx.h"
  49 #include "cm3xxx.h"
  50
  51 /*
  52  * The machine specific code may provide the extra mapping besides the
  53  * default mapping provided here.
  54  */
  55
  56 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
  57 static struct map_desc omap24xx_io_desc[] __initdata = {
  58         {
  59                 .virtual        = L3_24XX_VIRT,
  60                 .pfn            = __phys_to_pfn(L3_24XX_PHYS),
  61                 .length         = L3_24XX_SIZE,
  62                 .type           = MT_DEVICE
  63         },
  64         {
  65                 .virtual        = L4_24XX_VIRT,
  66                 .pfn            = __phys_to_pfn(L4_24XX_PHYS),
  67                 .length         = L4_24XX_SIZE,
  68                 .type           = MT_DEVICE
  69         },
  70 };
  71
  72 #ifdef CONFIG_SOC_OMAP2420
  73 static struct map_desc omap242x_io_desc[] __initdata = {
  74         {
  75                 .virtual        = DSP_MEM_2420_VIRT,
  76                 .pfn            = __phys_to_pfn(DSP_MEM_2420_PHYS),
  77                 .length         = DSP_MEM_2420_SIZE,
  78                 .type           = MT_DEVICE
  79         },
  80         {
  81                 .virtual        = DSP_IPI_2420_VIRT,
  82                 .pfn            = __phys_to_pfn(DSP_IPI_2420_PHYS),
  83                 .length         = DSP_IPI_2420_SIZE,
  84                 .type           = MT_DEVICE
  85         },
  86         {
  87                 .virtual        = DSP_MMU_2420_VIRT,
  88                 .pfn            = __phys_to_pfn(DSP_MMU_2420_PHYS),
  89                 .length         = DSP_MMU_2420_SIZE,
  90                 .type           = MT_DEVICE
  91         },
  92 };
  93
  94 #endif
  95
  96 #ifdef CONFIG_SOC_OMAP2430
  97 static struct map_desc omap243x_io_desc[] __initdata = {
  98         {
  99                 .virtual        = L4_WK_243X_VIRT,
 100                 .pfn            = __phys_to_pfn(L4_WK_243X_PHYS),
 101                 .length         = L4_WK_243X_SIZE,
 102                 .type           = MT_DEVICE
 103         },
 104         {
 105                 .virtual        = OMAP243X_GPMC_VIRT,
 106                 .pfn            = __phys_to_pfn(OMAP243X_GPMC_PHYS),
 107                 .length         = OMAP243X_GPMC_SIZE,
 108                 .type           = MT_DEVICE
 109         },
 110         {
 111                 .virtual        = OMAP243X_SDRC_VIRT,
 112                 .pfn            = __phys_to_pfn(OMAP243X_SDRC_PHYS),
 113                 .length         = OMAP243X_SDRC_SIZE,
 114                 .type           = MT_DEVICE
 115         },
 116         {
 117                 .virtual        = OMAP243X_SMS_VIRT,
 118                 .pfn            = __phys_to_pfn(OMAP243X_SMS_PHYS),
 119                 .length         = OMAP243X_SMS_SIZE,
 120                 .type           = MT_DEVICE
 121         },
 122 };
 123 #endif
 124 #endif
 125
 126 #ifdef  CONFIG_ARCH_OMAP3
 127 static struct map_desc omap34xx_io_desc[] __initdata = {
 128         {
 129                 .virtual        = L3_34XX_VIRT,
 130                 .pfn            = __phys_to_pfn(L3_34XX_PHYS),
 131                 .length         = L3_34XX_SIZE,
 132                 .type           = MT_DEVICE
 133         },
 134         {
 135                 .virtual        = L4_34XX_VIRT,
 136                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 137                 .length         = L4_34XX_SIZE,
 138                 .type           = MT_DEVICE
 139         },
 140         {
 141                 .virtual        = OMAP34XX_GPMC_VIRT,
 142                 .pfn            = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
 143                 .length         = OMAP34XX_GPMC_SIZE,
 144                 .type           = MT_DEVICE
 145         },
 146         {
 147                 .virtual        = OMAP343X_SMS_VIRT,
 148                 .pfn            = __phys_to_pfn(OMAP343X_SMS_PHYS),
 149                 .length         = OMAP343X_SMS_SIZE,
 150                 .type           = MT_DEVICE
 151         },
 152         {
 153                 .virtual        = OMAP343X_SDRC_VIRT,
 154                 .pfn            = __phys_to_pfn(OMAP343X_SDRC_PHYS),
 155                 .length         = OMAP343X_SDRC_SIZE,
 156                 .type           = MT_DEVICE
 157         },
 158         {
 159                 .virtual        = L4_PER_34XX_VIRT,
 160                 .pfn            = __phys_to_pfn(L4_PER_34XX_PHYS),
 161                 .length         = L4_PER_34XX_SIZE,
 162                 .type           = MT_DEVICE
 163         },
 164         {
 165                 .virtual        = L4_EMU_34XX_VIRT,
 166                 .pfn            = __phys_to_pfn(L4_EMU_34XX_PHYS),
 167                 .length         = L4_EMU_34XX_SIZE,
 168                 .type           = MT_DEVICE
 169         },
 170 #if defined(CONFIG_DEBUG_LL) &&                                                 \
 171         (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
 172         {
 173                 .virtual        = ZOOM_UART_VIRT,
 174                 .pfn            = __phys_to_pfn(ZOOM_UART_BASE),
 175                 .length         = SZ_1M,
 176                 .type           = MT_DEVICE
 177         },
 178 #endif
 179 };
 180 #endif
 181
 182 #ifdef CONFIG_SOC_TI81XX
 183 static struct map_desc omapti81xx_io_desc[] __initdata = {
 184         {
 185                 .virtual        = L4_34XX_VIRT,
 186                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 187                 .length         = L4_34XX_SIZE,
 188                 .type           = MT_DEVICE
 189         }
 190 };
 191 #endif
 192
 193 #ifdef CONFIG_SOC_AM33XX
 194 static struct map_desc omapam33xx_io_desc[] __initdata = {
 195         {
 196                 .virtual        = L4_34XX_VIRT,
 197                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 198                 .length         = L4_34XX_SIZE,
 199                 .type           = MT_DEVICE
 200         },
 201         {
 202                 .virtual        = L4_WK_AM33XX_VIRT,
 203                 .pfn            = __phys_to_pfn(L4_WK_AM33XX_PHYS),
 204                 .length         = L4_WK_AM33XX_SIZE,
 205                 .type           = MT_DEVICE
 206         }
 207 };
 208 #endif
 209
 210 #ifdef  CONFIG_ARCH_OMAP4
 211 static struct map_desc omap44xx_io_desc[] __initdata = {
 212         {
 213                 .virtual        = L3_44XX_VIRT,
 214                 .pfn            = __phys_to_pfn(L3_44XX_PHYS),
 215                 .length         = L3_44XX_SIZE,
 216                 .type           = MT_DEVICE,
 217         },
 218         {
 219                 .virtual        = L4_44XX_VIRT,
 220                 .pfn            = __phys_to_pfn(L4_44XX_PHYS),
 221                 .length         = L4_44XX_SIZE,
 222                 .type           = MT_DEVICE,
 223         },
 224         {
 225                 .virtual        = L4_PER_44XX_VIRT,
 226                 .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
 227                 .length         = L4_PER_44XX_SIZE,
 228                 .type           = MT_DEVICE,
 229         },
 230 #ifdef CONFIG_OMAP4_ERRATA_I688
 231         {
 232                 .virtual        = OMAP4_SRAM_VA,
 233                 .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
 234                 .length         = PAGE_SIZE,
 235                 .type           = MT_MEMORY_SO,
 236         },
 237 #endif
 238
 239 };
 240 #endif
 241
 242 #ifdef  CONFIG_SOC_OMAP5
 243 static struct map_desc omap54xx_io_desc[] __initdata = {
 244         {
 245                 .virtual        = L3_54XX_VIRT,
 246                 .pfn            = __phys_to_pfn(L3_54XX_PHYS),
 247                 .length         = L3_54XX_SIZE,
 248                 .type           = MT_DEVICE,
 249         },
 250         {
 251                 .virtual        = L4_54XX_VIRT,
 252                 .pfn            = __phys_to_pfn(L4_54XX_PHYS),
 253                 .length         = L4_54XX_SIZE,
 254                 .type           = MT_DEVICE,
 255         },
 256         {
 257                 .virtual        = L4_WK_54XX_VIRT,
 258                 .pfn            = __phys_to_pfn(L4_WK_54XX_PHYS),
 259                 .length         = L4_WK_54XX_SIZE,
 260                 .type           = MT_DEVICE,
 261         },
 262         {
 263                 .virtual        = L4_PER_54XX_VIRT,
 264                 .pfn            = __phys_to_pfn(L4_PER_54XX_PHYS),
 265                 .length         = L4_PER_54XX_SIZE,
 266                 .type           = MT_DEVICE,
 267         },
 268 };
 269 #endif
 270
 271 #ifdef CONFIG_SOC_OMAP2420
 272 void __init omap242x_map_io(void)
 273 {
 274         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 275         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
 276 }
 277 #endif
 278
 279 #ifdef CONFIG_SOC_OMAP2430
 280 void __init omap243x_map_io(void)
 281 {
 282         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 283         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
 284 }
 285 #endif
 286
 287 #ifdef CONFIG_ARCH_OMAP3
 288 void __init omap3_map_io(void)
 289 {
 290         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
 291 }
 292 #endif
 293
 294 #ifdef CONFIG_SOC_TI81XX
 295 void __init ti81xx_map_io(void)
 296 {
 297         iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 298 }
 299 #endif
 300
 301 #ifdef CONFIG_SOC_AM33XX
 302 void __init am33xx_map_io(void)
 303 {
 304         iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
 305 }
 306 #endif
 307
 308 #ifdef CONFIG_ARCH_OMAP4
 309 void __init omap4_map_io(void)
 310 {
 311         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
 312         omap_barriers_init();
 313 }
 314 #endif
 315
 316 #ifdef CONFIG_SOC_OMAP5
 317 void __init omap5_map_io(void)
 318 {
 319         iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
 320 }
 321 #endif
 322 /*
 323  * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
 324  *
 325  * Sets the CORE DPLL3 M2 divider to the same value that it's at
 326  * currently.  This has the effect of setting the SDRC SDRAM AC timing
 327  * registers to the values currently defined by the kernel.  Currently
 328  * only defined for OMAP3; will return 0 if called on OMAP2.  Returns
 329  * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
 330  * or passes along the return value of clk_set_rate().
 331  */
 332 static int __init _omap2_init_reprogram_sdrc(void)
 333 {
 334         struct clk *dpll3_m2_ck;
 335         int v = -EINVAL;
 336         long rate;
 337
 338         if (!cpu_is_omap34xx())
 339                 return 0;
 340
 341         dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
 342         if (IS_ERR(dpll3_m2_ck))
 343                 return -EINVAL;
 344
 345         rate = clk_get_rate(dpll3_m2_ck);
 346         pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
 347         v = clk_set_rate(dpll3_m2_ck, rate);
 348         if (v)
 349                 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
 350
 351         clk_put(dpll3_m2_ck);
 352
 353         return v;
 354 }
 355
 356 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
 357 {
 358         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 359 }
 360
 361 static void __init omap_common_init_early(void)
 362 {
 363         omap_init_consistent_dma_size();
 364 }
 365
 366 static void __init omap_hwmod_init_postsetup(void)
 367 {
 368         u8 postsetup_state;
 369
 370         /* Set the default postsetup state for all hwmods */
 371 #ifdef CONFIG_PM_RUNTIME
 372         postsetup_state = _HWMOD_STATE_IDLE;
 373 #else
 374         postsetup_state = _HWMOD_STATE_ENABLED;
 375 #endif
 376         omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
 377
 378         omap_pm_if_early_init();
 379 }
 380
 381 #ifdef CONFIG_SOC_OMAP2420
 382 void __init omap2420_init_early(void)
 383 {
 384         omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
 385         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
 386                                OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
 387         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
 388                                   NULL);
 389         omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
 390                                OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
 391                                NULL, NULL);
 392         omap2xxx_check_revision();
 393         omap2xxx_cm_init();
 394         omap_common_init_early();
 395         omap2xxx_voltagedomains_init();
 396         omap242x_powerdomains_init();
 397         omap242x_clockdomains_init();
 398         omap2420_hwmod_init();
 399         omap_hwmod_init_postsetup();
 400         omap2420_clk_init();
 401 }
 402
 403 void __init omap2420_init_late(void)
 404 {
 405         omap_mux_late_init();
 406         omap2_common_pm_late_init();
 407         omap2_pm_init();
 408 }
 409 #endif
 410
 411 #ifdef CONFIG_SOC_OMAP2430
 412 void __init omap2430_init_early(void)
 413 {
 414         omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
 415         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
 416                                OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
 417         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
 418                                   NULL);
 419         omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
 420                                OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
 421                                NULL, NULL);
 422         omap2xxx_check_revision();
 423         omap2xxx_cm_init();
 424         omap_common_init_early();
 425         omap2xxx_voltagedomains_init();
 426         omap243x_powerdomains_init();
 427         omap243x_clockdomains_init();
 428         omap2430_hwmod_init();
 429         omap_hwmod_init_postsetup();
 430         omap2430_clk_init();
 431 }
 432
 433 void __init omap2430_init_late(void)
 434 {
 435         omap_mux_late_init();
 436         omap2_common_pm_late_init();
 437         omap2_pm_init();
 438 }
 439 #endif
 440
 441 /*
 442  * Currently only board-omap3beagle.c should call this because of the
 443  * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
 444  */
 445 #ifdef CONFIG_ARCH_OMAP3
 446 void __init omap3_init_early(void)
 447 {
 448         omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
 449         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
 450                                OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
 451         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
 452                                   NULL);
 453         omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
 454                                OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
 455                                NULL, NULL);
 456         omap3xxx_check_revision();
 457         omap3xxx_check_features();
 458         omap3xxx_cm_init();
 459         omap_common_init_early();
 460         omap3xxx_voltagedomains_init();
 461         omap3xxx_powerdomains_init();
 462         omap3xxx_clockdomains_init();
 463         omap3xxx_hwmod_init();
 464         omap_hwmod_init_postsetup();
 465         omap3xxx_clk_init();
 466 }
 467
 468 void __init omap3430_init_early(void)
 469 {
 470         omap3_init_early();
 471 }
 472
 473 void __init omap35xx_init_early(void)
 474 {
 475         omap3_init_early();
 476 }
 477
 478 void __init omap3630_init_early(void)
 479 {
 480         omap3_init_early();
 481 }
 482
 483 void __init am35xx_init_early(void)
 484 {
 485         omap3_init_early();
 486 }
 487
 488 void __init ti81xx_init_early(void)
 489 {
 490         omap2_set_globals_tap(OMAP343X_CLASS,
 491                               OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
 492         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
 493                                   NULL);
 494         omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
 495                                OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
 496                                NULL, NULL);
 497         omap3xxx_check_revision();
 498         ti81xx_check_features();
 499         omap_common_init_early();
 500         omap3xxx_voltagedomains_init();
 501         omap3xxx_powerdomains_init();
 502         omap3xxx_clockdomains_init();
 503         omap3xxx_hwmod_init();
 504         omap_hwmod_init_postsetup();
 505         omap3xxx_clk_init();
 506 }
 507
 508 void __init omap3_init_late(void)
 509 {
 510         omap_mux_late_init();
 511         omap2_common_pm_late_init();
 512         omap3_pm_init();
 513 }
 514
 515 void __init omap3430_init_late(void)
 516 {
 517         omap_mux_late_init();
 518         omap2_common_pm_late_init();
 519         omap3_pm_init();
 520 }
 521
 522 void __init omap35xx_init_late(void)
 523 {
 524         omap_mux_late_init();
 525         omap2_common_pm_late_init();
 526         omap3_pm_init();
 527 }
 528
 529 void __init omap3630_init_late(void)
 530 {
 531         omap_mux_late_init();
 532         omap2_common_pm_late_init();
 533         omap3_pm_init();
 534 }
 535
 536 void __init am35xx_init_late(void)
 537 {
 538         omap_mux_late_init();
 539         omap2_common_pm_late_init();
 540         omap3_pm_init();
 541 }
 542
 543 void __init ti81xx_init_late(void)
 544 {
 545         omap_mux_late_init();
 546         omap2_common_pm_late_init();
 547         omap3_pm_init();
 548 }
 549 #endif
 550
 551 #ifdef CONFIG_SOC_AM33XX
 552 void __init am33xx_init_early(void)
 553 {
 554         omap2_set_globals_tap(AM335X_CLASS,
 555                               AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
 556         omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
 557                                   NULL);
 558         omap2_set_globals_prcm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
 559                                AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
 560                                NULL, NULL);
 561         omap3xxx_check_revision();
 562         ti81xx_check_features();
 563         omap_common_init_early();
 564         am33xx_voltagedomains_init();
 565         am33xx_powerdomains_init();
 566         am33xx_clockdomains_init();
 567         am33xx_hwmod_init();
 568         omap_hwmod_init_postsetup();
 569         am33xx_clk_init();
 570 }
 571 #endif
 572
 573 #ifdef CONFIG_ARCH_OMAP4
 574 void __init omap4430_init_early(void)
 575 {
 576         omap2_set_globals_tap(OMAP443X_CLASS,
 577                               OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
 578         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
 579                                   OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
 580         omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
 581                                OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
 582                                OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
 583                                OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
 584         omap4xxx_check_revision();
 585         omap4xxx_check_features();
 586         omap_common_init_early();
 587         omap44xx_voltagedomains_init();
 588         omap44xx_powerdomains_init();
 589         omap44xx_clockdomains_init();
 590         omap44xx_hwmod_init();
 591         omap_hwmod_init_postsetup();
 592         omap4xxx_clk_init();
 593 }
 594
 595 void __init omap4430_init_late(void)
 596 {
 597         omap_mux_late_init();
 598         omap2_common_pm_late_init();
 599         omap4_pm_init();
 600 }
 601 #endif
 602
 603 #ifdef CONFIG_SOC_OMAP5
 604 void __init omap5_init_early(void)
 605 {
 606         omap2_set_globals_tap(OMAP54XX_CLASS,
 607                               OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
 608         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
 609                                   OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
 610         omap2_set_globals_prcm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
 611                                OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
 612                                OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
 613                                OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 614         omap5xxx_check_revision();
 615         omap_common_init_early();
 616 }
 617 #endif
 618
 619 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 620                                       struct omap_sdrc_params *sdrc_cs1)
 621 {
 622         omap_sram_init();
 623
 624         if (cpu_is_omap24xx() || omap3_has_sdrc()) {
 625                 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
 626                 _omap2_init_reprogram_sdrc();
 627         }
 628 }