2 * linux/arch/arm/plat-omap/i2c.c
4 * Helper module for board specific I2C bus registration
6 * Copyright (C) 2007 Nokia Corporation.
8 * Contact: Jarkko Nikula <jhnikula@gmail.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
26 #include <linux/kernel.h>
27 #include <linux/platform_device.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c-omap.h>
30 #include <linux/slab.h>
31 #include <linux/err.h>
32 #include <linux/clk.h>
34 #include <mach/irqs.h>
37 #include <plat/omap-pm.h>
38 #include <plat/omap_device.h>
40 #define OMAP_I2C_SIZE 0x3f
41 #define OMAP1_I2C_BASE 0xfffb3800
42 #define OMAP1_INT_I2C (32 + 4)
44 static const char name[] = "omap_i2c";
46 #define I2C_RESOURCE_BUILDER(base, irq) \
49 .end = (base) + OMAP_I2C_SIZE, \
50 .flags = IORESOURCE_MEM, \
54 .flags = IORESOURCE_IRQ, \
57 static struct resource i2c_resources[][2] = {
58 { I2C_RESOURCE_BUILDER(0, 0) },
61 #define I2C_DEV_BUILDER(bus_id, res, data) \
65 .num_resources = ARRAY_SIZE(res), \
68 .platform_data = (data), \
72 #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
73 #define OMAP_I2C_MAX_CONTROLLERS 4
74 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
75 static struct platform_device omap_i2c_devices[] = {
76 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
79 #define OMAP_I2C_CMDLINE_SETUP (BIT(31))
81 static int __init omap_i2c_nr_ports(void)
85 if (cpu_class_is_omap1())
87 else if (cpu_is_omap24xx())
89 else if (cpu_is_omap34xx())
91 else if (cpu_is_omap44xx())
97 static inline int omap1_i2c_add_bus(int bus_id)
99 struct platform_device *pdev;
100 struct omap_i2c_bus_platform_data *pdata;
101 struct resource *res;
103 omap1_i2c_mux_pins(bus_id);
105 pdev = &omap_i2c_devices[bus_id - 1];
106 res = pdev->resource;
107 res[0].start = OMAP1_I2C_BASE;
108 res[0].end = res[0].start + OMAP_I2C_SIZE;
109 res[1].start = OMAP1_INT_I2C;
110 pdata = &i2c_pdata[bus_id - 1];
112 /* all OMAP1 have IP version 1 register set */
113 pdata->rev = OMAP_I2C_IP_VERSION_1;
115 /* all OMAP1 I2C are implemented like this */
116 pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
117 OMAP_I2C_FLAG_SIMPLE_CLOCK |
118 OMAP_I2C_FLAG_16BIT_DATA_REG |
119 OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
121 /* how the cpu bus is wired up differs for 7xx only */
123 if (cpu_is_omap7xx())
124 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
126 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
128 return platform_device_register(pdev);
132 #ifdef CONFIG_ARCH_OMAP2PLUS
134 * XXX This function is a temporary compatibility wrapper - only
135 * needed until the I2C driver can be converted to call
136 * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
138 static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
140 omap_pm_set_max_mpu_wakeup_lat(dev, t);
143 static inline int omap2_i2c_add_bus(int bus_id)
146 struct omap_hwmod *oh;
147 struct platform_device *pdev;
148 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
149 struct omap_i2c_bus_platform_data *pdata;
150 struct omap_i2c_dev_attr *dev_attr;
152 omap2_i2c_mux_pins(bus_id);
154 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
155 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
156 "String buffer overflow in I2C%d device setup\n", bus_id);
157 oh = omap_hwmod_lookup(oh_name);
159 pr_err("Could not look up %s\n", oh_name);
163 pdata = &i2c_pdata[bus_id - 1];
165 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
166 * use, and functionality implementation flags, up to the OMAP I2C
167 * driver via platform data
169 pdata->rev = oh->class->rev;
171 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
172 pdata->flags = dev_attr->flags;
175 * When waiting for completion of a i2c transfer, we need to
176 * set a wake up latency constraint for the MPU. This is to
177 * ensure quick enough wakeup from idle, when transfer
179 * Only omap3 has support for constraints
181 if (cpu_is_omap34xx())
182 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
183 pdev = omap_device_build(name, bus_id, oh, pdata,
184 sizeof(struct omap_i2c_bus_platform_data),
186 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
188 return PTR_RET(pdev);
191 static inline int omap2_i2c_add_bus(int bus_id)
197 static int __init omap_i2c_add_bus(int bus_id)
199 if (cpu_class_is_omap1())
200 return omap1_i2c_add_bus(bus_id);
202 return omap2_i2c_add_bus(bus_id);
206 * omap_i2c_bus_setup - Process command line options for the I2C bus speed
207 * @str: String of options
209 * This function allow to override the default I2C bus speed for given I2C
210 * bus with a command line option.
212 * Format: i2c_bus=bus_id,clkrate (in kHz)
214 * Returns 1 on success, 0 otherwise.
216 static int __init omap_i2c_bus_setup(char *str)
221 ports = omap_i2c_nr_ports();
222 get_options(str, 3, ints);
223 if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
225 i2c_pdata[ints[1] - 1].clkrate = ints[2];
226 i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
230 __setup("i2c_bus=", omap_i2c_bus_setup);
233 * Register busses defined in command line but that are not registered with
234 * omap_register_i2c_bus from board initialization code.
236 static int __init omap_register_i2c_bus_cmdline(void)
240 for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
241 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
242 i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
243 err = omap_i2c_add_bus(i + 1);
251 subsys_initcall(omap_register_i2c_bus_cmdline);
254 * omap_register_i2c_bus - register I2C bus with device descriptors
255 * @bus_id: bus id counting from number 1
256 * @clkrate: clock rate of the bus in kHz
257 * @info: pointer into I2C device descriptor table or NULL
258 * @len: number of descriptors in the table
260 * Returns 0 on success or an error code.
262 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
263 struct i2c_board_info const *info,
268 BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
271 err = i2c_register_board_info(bus_id, info, len);
276 if (!i2c_pdata[bus_id - 1].clkrate)
277 i2c_pdata[bus_id - 1].clkrate = clkrate;
279 i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
281 return omap_i2c_add_bus(bus_id);