From 197080c62e8c10b68213642bdcd64e81db79e10a Mon Sep 17 00:00:00 2001 From: jcar Date: Mon, 27 Feb 2012 15:01:25 +0100 Subject: [PATCH] Added SPI support to 5604b --- .../ppc/mpc55xx/drivers/MPC5604B_0M27V_0102.h | 203 +--------------- arch/ppc/mpc55xx/drivers/Mcu.c | 3 +- arch/ppc/mpc55xx/drivers/Spi.c | 18 +- boards/mpc5604b_trk/board_info.txt | 59 +---- boards/mpc5604b_trk/config/Spi_Cfg.h | 96 -------- boards/mpc5604b_trk/config/Spi_Lcfg.c | 217 ------------------ boards/mpc5606s_xpc560s/config/Spi_Cfg.h | 96 -------- boards/mpc5606s_xpc560s/config/Spi_Lcfg.c | 217 ------------------ 8 files changed, 21 insertions(+), 888 deletions(-) delete mode 100644 boards/mpc5604b_trk/config/Spi_Cfg.h delete mode 100644 boards/mpc5604b_trk/config/Spi_Lcfg.c delete mode 100644 boards/mpc5606s_xpc560s/config/Spi_Cfg.h delete mode 100644 boards/mpc5606s_xpc560s/config/Spi_Lcfg.c diff --git a/arch/ppc/mpc55xx/drivers/MPC5604B_0M27V_0102.h b/arch/ppc/mpc55xx/drivers/MPC5604B_0M27V_0102.h index da01f709..14d76ad6 100644 --- a/arch/ppc/mpc55xx/drivers/MPC5604B_0M27V_0102.h +++ b/arch/ppc/mpc55xx/drivers/MPC5604B_0M27V_0102.h @@ -34,6 +34,7 @@ #ifndef _MPC5604B_H_ #define _MPC5604B_H_ +#include "Compiler.h" #include "typedefs.h" #ifdef __cplusplus @@ -1054,208 +1055,8 @@ extern "C" { /****************************************************************************/ /* MODULE : DSPI */ /****************************************************************************/ - struct DSPI_tag { - union { - vuint32_t R; - struct { - vuint32_t MSTR:1; - vuint32_t CONT_SCKE:1; - vuint32_t DCONF:2; - vuint32_t FRZ:1; - vuint32_t MTFE:1; - vuint32_t PCSSE:1; - vuint32_t ROOE:1; - vuint32_t:2; - vuint32_t PCSIS5:1; - vuint32_t PCSIS4:1; - vuint32_t PCSIS3:1; - vuint32_t PCSIS2:1; - vuint32_t PCSIS1:1; - vuint32_t PCSIS0:1; - vuint32_t DOZE:1; - vuint32_t MDIS:1; - vuint32_t DIS_TXF:1; - vuint32_t DIS_RXF:1; - vuint32_t CLR_TXF:1; - vuint32_t CLR_RXF:1; - vuint32_t SMPL_PT:2; - vuint32_t:7; - vuint32_t HALT:1; - } B; - } MCR; /* Module Configuration Register */ - - uint32_t dspi_reserved1; - - union { - vuint32_t R; - struct { - vuint32_t TCNT:16; - vuint32_t:16; - } B; - } TCR; - - union { - vuint32_t R; - struct { - vuint32_t DBR:1; - vuint32_t FMSZ:4; - vuint32_t CPOL:1; - vuint32_t CPHA:1; - vuint32_t LSBFE:1; - vuint32_t PCSSCK:2; - vuint32_t PASC:2; - vuint32_t PDT:2; - vuint32_t PBR:2; - vuint32_t CSSCK:4; - vuint32_t ASC:4; - vuint32_t DT:4; - vuint32_t BR:4; - } B; - } CTAR[8]; /* Clock and Transfer Attributes Registers */ - - union { - vuint32_t R; - struct { - vuint32_t TCF:1; - vuint32_t TXRXS:1; - vuint32_t:1; - vuint32_t EOQF:1; - vuint32_t TFUF:1; - vuint32_t:1; - vuint32_t TFFF:1; - vuint32_t:5; - vuint32_t RFOF:1; - vuint32_t:1; - vuint32_t RFDF:1; - vuint32_t:1; - vuint32_t TXCTR:4; - vuint32_t TXNXTPTR:4; - vuint32_t RXCTR:4; - vuint32_t POPNXTPTR:4; - } B; - } SR; /* Status Register */ - - union { - vuint32_t R; - struct { - vuint32_t TCFRE:1; - vuint32_t:2; - vuint32_t EOQFRE:1; - vuint32_t TFUFRE:1; - vuint32_t:1; - vuint32_t TFFFRE:1; - vuint32_t TFFFDIRS:1; - vuint32_t:4; - vuint32_t RFOFRE:1; - vuint32_t:1; - vuint32_t RFDFRE:1; - vuint32_t RFDFDIRS:1; - vuint32_t:16; - } B; - } RSER; /* DMA/Interrupt Request Select and Enable Register */ - - union { - vuint32_t R; - struct { - vuint32_t CONT:1; - vuint32_t CTAS:3; - vuint32_t EOQ:1; - vuint32_t CTCNT:1; - vuint32_t:4; - vuint32_t PCS5:1; - vuint32_t PCS4:1; - vuint32_t PCS3:1; - vuint32_t PCS2:1; - vuint32_t PCS1:1; - vuint32_t PCS0:1; - vuint32_t TXDATA:16; - } B; - } PUSHR; /* PUSH TX FIFO Register */ - - union { - vuint32_t R; - struct { - vuint32_t:16; - vuint32_t RXDATA:16; - } B; - } POPR; /* POP RX FIFO Register */ - - union { - vuint32_t R; - struct { - vuint32_t TXCMD:16; - vuint32_t TXDATA:16; - } B; - } TXFR[4]; /* Transmit FIFO Registers */ - - vuint32_t DSPI_reserved_txf[12]; - - union { - vuint32_t R; - struct { - vuint32_t:16; - vuint32_t RXDATA:16; - } B; - } RXFR[4]; /* Transmit FIFO Registers */ - - vuint32_t DSPI_reserved_rxf[12]; - - union { - vuint32_t R; - struct { - vuint32_t MTOE:1; - vuint32_t:1; - vuint32_t MTOCNT:6; - vuint32_t:4; - vuint32_t TXSS:1; - vuint32_t TPOL:1; - vuint32_t TRRE:1; - vuint32_t CID:1; - vuint32_t DCONT:1; - vuint32_t DSICTAS:3; - vuint32_t:6; - vuint32_t DPCS5:1; - vuint32_t DPCS4:1; - vuint32_t DPCS3:1; - vuint32_t DPCS2:1; - vuint32_t DPCS1:1; - vuint32_t DPCS0:1; - } B; - } DSICR; /* DSI Configuration Register */ - - union { - vuint32_t R; - struct { - vuint32_t:16; - vuint32_t SER_DATA:16; - } B; - } SDR; /* DSI Serialization Data Register */ - - union { - vuint32_t R; - struct { - vuint32_t:16; - vuint32_t ASER_DATA:16; - } B; - } ASDR; /* DSI Alternate Serialization Data Register */ - - union { - vuint32_t R; - struct { - vuint32_t:16; - vuint32_t COMP_DATA:16; - } B; - } COMPR; /* DSI Transmit Comparison Register */ - - union { - vuint32_t R; - struct { - vuint32_t:16; - vuint32_t DESER_DATA:16; - } B; - } DDR; /* DSI deserialization Data Register */ +#include "ip_dspi.h" - }; /* end of DSPI_tag */ /****************************************************************************/ /* MODULE : ECSM */ /****************************************************************************/ diff --git a/arch/ppc/mpc55xx/drivers/Mcu.c b/arch/ppc/mpc55xx/drivers/Mcu.c index b512dced..19fbafca 100644 --- a/arch/ppc/mpc55xx/drivers/Mcu.c +++ b/arch/ppc/mpc55xx/drivers/Mcu.c @@ -466,7 +466,8 @@ Std_ReturnType Mcu_InitClock(const Mcu_ClockType ClockSetting) CGM.SC_DC[1].R = 0x80; /* MPC56xxB/S: Enable peri set 1 sysclk divided by 1 */ CGM.SC_DC[2].R = 0x80; /* MPC56xxB/S: Enable peri set 1 sysclk divided by 1 */ - SIU.PSMI[0].R = 0x01; + SIU.PSMI[0].R = 0x01; /* CAN1RX on PCR43 */ + SIU.PSMI[6].R = 0x01; /* CS0/DSPI_0 on PCR15 */ #elif defined(CFG_MPC5606S) // Write pll parameters. diff --git a/arch/ppc/mpc55xx/drivers/Spi.c b/arch/ppc/mpc55xx/drivers/Spi.c index 0828e132..c236fc8b 100644 --- a/arch/ppc/mpc55xx/drivers/Spi.c +++ b/arch/ppc/mpc55xx/drivers/Spi.c @@ -155,7 +155,9 @@ //#include #include "Mcu.h" #include "math.h" +#if (SPI_IMPLEMENTATION==SPI_DMA) #include "Dma.h" +#endif #include "Det.h" #include "isr.h" /* ----------------------------[private define]------------------------------*/ @@ -419,10 +421,10 @@ static void Spi_WriteJob_FIFO( Spi_JobType jobIndex ); /** * Get the buffer for a channel. - * - * @param ch - * @param length - * @return + * + * @param ch + * @param length + * @return */ static Spi_DataType *spiGetRxBuf(Spi_ChannelType ch, Spi_NumberOfDataType *length ) { Spi_DataType *buf; @@ -1438,10 +1440,10 @@ Std_ReturnType Spi_DeInit(void) { #if (SPI_IMPLEMENTATION==SPI_DMA) /** - * - * @param spiUnit - * @param jobConfig - * @return + * + * @param spiUnit + * @param jobConfig + * @return */ static void Spi_DoWrite_DMA( Spi_UnitType *spiUnit,Spi_JobType jobIndex, const Spi_JobConfigType *jobConfig ) diff --git a/boards/mpc5604b_trk/board_info.txt b/boards/mpc5604b_trk/board_info.txt index da77e0bc..e54be902 100644 --- a/boards/mpc5604b_trk/board_info.txt +++ b/boards/mpc5604b_trk/board_info.txt @@ -1,18 +1,14 @@ -The Freescale MPC5606S is an PowerPC process with a e200Z0h core, VLE only +The Freescale MPC5604B is an PowerPC process with a e200Z0h core, VLE only Datasheets: Eval board: - http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=XPC560SKIT - http://cache.freescale.com/files/microcontrollers/hardware_tools/schematics/XPC560SADPT176SSCH.pdf?fpsp=1 - http://cache.freescale.com/files/32bit/doc/user_guide/XPC560SEVBUM.pdf?fpsp=1 - Mainboard schematic - http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC560xB_EVB&parentCode=XPC56xxMB&fpsp=1&nodeId=01624606C1427E + http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=TRK-MPC5604B - MPC560x - http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC560xS&fsrch=1&sr=1 + MPC560xB + http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC560xB&webpageId=121120349534072559427E&nodeId=01624606C1427E&fromPage=tax Board: 8Mhz external crystal @@ -21,61 +17,20 @@ Supported compilers: Code Warrior Info: - MPC5606S + MPC5604B CPU: e200z0h (VLE only) Freq: 64 Mhz - Flash: 1.0 MB, primary + Flash: 512KB, primary 64K, data flash RAM: 48K, ECC - 160K, Graphics RAM (not ECC) Memory Map: - 0x0000_0000 -> 0x000f_ffff Flash + 0x0000_0000 -> 0x0007_ffff Flash 0x0080_0000 -> 0x0080_ffff Data Flash 0x4000_0000 -> 0x4000_bfff SRAM - 0x6000_0000 -> 0x6002_7fff Graphics SRAM -== SPI == - -Adding a SPI EEPROM (Microship 25LC160B) - -To the left are the pins as they are names in XPC56xxMBSCH (schema for the main board, page 11 of 12) - -<- XPC560S ->#<---------------------- MCU ----------------------------------------> - # PAD Func Per # Shared with --------------------------------------------------------------------------------------------- -SINB,PJ1-7 # PB[7] 23 1 SIN_0 DSPI_0 56 (SIUL/PWM/Timer) -SOUTB,PJ1-8 # PB[8] 24 1 SOUT_0 DSPI_0 55 (SIUL/PWM/Timer) -SCKB,PJ1-9 # PB[9] 25 1 SCK_0 DSPI_0 54 (SIUL/PWM/Timer) -PCSB2,PJ1-12 # PB[12] 28 3 PCS2_0 DSPI_0 48 (SIUL/LinFlex_1/Timer) -PCSB1,PJ1-11 # PB[13] 29 3 PCS1_0 DSPI_0 49 (SIUL/LinFlex_1/Timer) -PCSB0,PJ1-10 # PH[4] 103 1 PCS0_0 DSPI_0 61 (SIUL/PWM/Timer/Control) Control=CLKOUT - -25LC160B - CS - Connect to PJ1-11 - /WP - High - /HOLD - Low - Rest of the pins are obvious - - Connected with 5V logic - -PORT J will have the following layout -(With ArcCore internal harness and SO/SI as seen from memory): - - 1-X X-2 - 3-X X-4 - 5-X X-6 - SO/Brown 7-X X-8 SI/Orange - SCK/Blue 9-X X-10 - CS/Green 11-X X-12 - 13-X X-14 - 15-X X-16 - Gnd/Black 17-X X-18 VCC/Red - - - diff --git a/boards/mpc5604b_trk/config/Spi_Cfg.h b/boards/mpc5604b_trk/config/Spi_Cfg.h deleted file mode 100644 index ca1d3006..00000000 --- a/boards/mpc5604b_trk/config/Spi_Cfg.h +++ /dev/null @@ -1,96 +0,0 @@ -/* -* Configuration of module: Spi (Spi_Cfg.h) -* -* Created by: -* Copyright: -* -* Configured for (MCU): MPC560x -* -* Module vendor: ArcCore -* Generator version: 2.0.13 -* -* Generated by Arctic Studio (http://arccore.com) -* on Tue Jun 14 20:57:25 CEST 2011 -*/ - - - -#ifndef SPI_CFG_H -#define SPI_CFG_H - -#include "Dma.h" -#include "mpc55xx.h" -#include "Mcu.h" - -#define DSPI_CTRL_A 0 -#define DSPI_CTRL_B 1 -#define DSPI_CTRL_C 2 -#define DSPI_CTRL_D 3 - -/* - * General configuration - */ - -// Switches the Spi_Cancel function ON or OFF. -#define SPI_CANCEL_API STD_ON - -// Selects the SPI Handler/Driver Channel Buffers usage allowed and delivered. -// LEVEL 0 - Only Internal buffers -// LEVEL 1 - Only external buffers -// LEVEL 2 - Both internal/external buffers -#define SPI_CHANNEL_BUFFERS_ALLOWED 1 - -#define SPI_DEV_ERROR_DETECT STD_ON -// Switches the Spi_GetHWUnitStatus function ON or OFF. -#define SPI_HW_STATUS_API STD_ON -// Switches the Interruptible Sequences handling functionality ON or OFF. -#define SPI_INTERRUPTIBLE_SEQ_ALLOWED STD_OFF - -// LEVEL 0 - Simple sync -// LEVEL 1 - Basic async -// LEVEL 2 - Enhanced mode -#define SPI_LEVEL_DELIVERED 2 - -#define SPI_VERSION_INFO_API STD_ON - -#if 0 -#if SPI_LEVEL_DELIVERED>=1 -#define SPI_INTERRUPTIBLE_SEQ_ALLOWED STD_ON -#endif -#endif - -// External devices -typedef enum { - SPI_device_1, -} Spi_ExternalDeviceTypeType; - -// Channels -#define SPI_CH_WREN 0 -#define SPI_CH_CMD 1 -#define SPI_CH_DATA 2 -#define SPI_CH_ADDR 3 - -// Jobs -#define SPI_JOB_CMD2 0 -#define SPI_JOB_DATA 1 -#define SPI_JOB_CMD 2 -#define SPI_JOB_WREN 3 - -// Sequences -#define SPI_SEQ_CMD 0 -#define SPI_SEQ_WRITE 1 -#define SPI_SEQ_READ 2 -#define SPI_SEQ_CMD2 3 - - -#define SPI_MAX_JOB 4 -#define SPI_MAX_CHANNEL 4 -#define SPI_MAX_SEQUENCE 4 - -#define SPI_USE_HW_UNIT_0 STD_ON -#define SPI_USE_HW_UNIT_1 STD_OFF -#define SPI_USE_HW_UNIT_2 STD_OFF -#define SPI_USE_HW_UNIT_3 STD_OFF - - -#endif /*SPI_CFG_H*/ diff --git a/boards/mpc5604b_trk/config/Spi_Lcfg.c b/boards/mpc5604b_trk/config/Spi_Lcfg.c deleted file mode 100644 index 36e91be0..00000000 --- a/boards/mpc5604b_trk/config/Spi_Lcfg.c +++ /dev/null @@ -1,217 +0,0 @@ -/* -* Configuration of module: Spi (Spi_Lcfg.c) -* -* Created by: -* Copyright: -* -* Configured for (MCU): MPC560x -* -* Module vendor: ArcCore -* Generator version: 2.0.13 -* -* Generated by Arctic Studio (http://arccore.com) -* on Tue Jun 14 20:57:25 CEST 2011 -*/ - - - -#include "Spi.h" -#include "Spi_Cfg.h" -#include - - - -// SPI_0 -//#define SPI_0_CS 1 /* Using PCSB1 */ -#define SPI_0_CS 2 /* Using PCSB2 */ - - -#define SPI_SEQ_END_NOTIFICATION NULL -#define SPI_JOB_END_NOTIFICAITON NULL - -// Notifications -// Seq -#define SPI_SEQ_CMD_END_NOTIFICATION NULL -#define SPI_SEQ_WRITE_END_NOTIFICATION NULL -#define SPI_SEQ_READ_END_NOTIFICATION NULL -#define SPI_SEQ_CMD2_END_NOTIFICATION NULL -// Jobs -#define SPI_JOB_CMD2_END_NOTIFICATION NULL -#define SPI_JOB_DATA_END_NOTIFICATION NULL -#define SPI_JOB_CMD_END_NOTIFICATION NULL -#define SPI_JOB_WREN_END_NOTIFICATION NULL - - -/*************** Sequences **************/ -const Spi_SequenceConfigType SpiSequenceConfigData[] = -{ - { - .SpiSequenceId = SPI_SEQ_CMD, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_CMD_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_CMD, - (-1) - }, - }, - { - .SpiSequenceId = SPI_SEQ_WRITE, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_WRITE_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_WREN, - SPI_JOB_DATA, - (-1) - }, - }, - { - .SpiSequenceId = SPI_SEQ_READ, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_READ_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_DATA, - (-1) - }, - }, - { - .SpiSequenceId = SPI_SEQ_CMD2, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_CMD2_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_CMD2, - (-1) - }, - }, -}; - -/*************** Jobs **************/ -const Spi_JobConfigType SpiJobConfigData[] = -{ - { - .SpiJobId = SPI_JOB_CMD2, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_CMD2_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_CMD, - SPI_CH_DATA, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, - { - .SpiJobId = SPI_JOB_DATA, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_DATA_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_CMD, - SPI_CH_ADDR, - SPI_CH_DATA, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, - { - .SpiJobId = SPI_JOB_CMD, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_CMD_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_CMD, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, - { - .SpiJobId = SPI_JOB_WREN, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_WREN_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_WREN, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, -}; - -uint32 Spi_GetJobCnt(void ) { return sizeof(SpiJobConfigData)/sizeof(SpiJobConfigData[0]); } - - -/*************** Channels **************/ -const Spi_ChannelConfigType SpiChannelConfigData[] = -{ - { - .SpiChannelId = SPI_CH_WREN, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 8, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 1, - .SpiDefaultData = 6, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = SPI_CH_CMD, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 8, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 64, - .SpiDefaultData = 0, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = SPI_CH_DATA, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 8, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 64, - .SpiDefaultData = 0, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = SPI_CH_ADDR, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 16, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 64, - .SpiDefaultData = 0, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = (-1), - } -}; - -uint32 Spi_GetChanneCnt(void ) { return sizeof(SpiChannelConfigData)/sizeof(SpiChannelConfigData[0]); } - -/*************** External Devices **************/ -const Spi_ExternalDeviceType SpiExternalConfigData[] = -{ - { - .SpiBaudrate = 100000UL, - .SpiCsIdentifier = 1, - .SpiCsPolarity = STD_LOW, - .SpiDataShiftEdge = SPI_EDGE_LEADING, - .SpiEnableCs = 0, // NOT SUPPORTED IN TOOLS - .SpiShiftClockIdleLevel = STD_LOW, - .SpiTimeClk2Cs = 606, // ns - .SpiTimeCs2Clk = 606, // ns - }, -}; - -uint32 Spi_GetExternalDeviceCnt(void ) { return sizeof(SpiExternalConfigData)/sizeof(SpiExternalConfigData[0]); } - - - -const Spi_DriverType SpiConfigData = -{ - .SpiMaxChannel = SPI_MAX_CHANNEL, - .SpiMaxJob = SPI_MAX_JOB, - .SpiMaxSequence = SPI_MAX_SEQUENCE, - .SpiChannelConfig = &SpiChannelConfigData[0], - .SpiSequenceConfig = &SpiSequenceConfigData[0], - .SpiJobConfig = &SpiJobConfigData[0], - .SpiExternalDevice = &SpiExternalConfigData[0], -}; - diff --git a/boards/mpc5606s_xpc560s/config/Spi_Cfg.h b/boards/mpc5606s_xpc560s/config/Spi_Cfg.h deleted file mode 100644 index ca1d3006..00000000 --- a/boards/mpc5606s_xpc560s/config/Spi_Cfg.h +++ /dev/null @@ -1,96 +0,0 @@ -/* -* Configuration of module: Spi (Spi_Cfg.h) -* -* Created by: -* Copyright: -* -* Configured for (MCU): MPC560x -* -* Module vendor: ArcCore -* Generator version: 2.0.13 -* -* Generated by Arctic Studio (http://arccore.com) -* on Tue Jun 14 20:57:25 CEST 2011 -*/ - - - -#ifndef SPI_CFG_H -#define SPI_CFG_H - -#include "Dma.h" -#include "mpc55xx.h" -#include "Mcu.h" - -#define DSPI_CTRL_A 0 -#define DSPI_CTRL_B 1 -#define DSPI_CTRL_C 2 -#define DSPI_CTRL_D 3 - -/* - * General configuration - */ - -// Switches the Spi_Cancel function ON or OFF. -#define SPI_CANCEL_API STD_ON - -// Selects the SPI Handler/Driver Channel Buffers usage allowed and delivered. -// LEVEL 0 - Only Internal buffers -// LEVEL 1 - Only external buffers -// LEVEL 2 - Both internal/external buffers -#define SPI_CHANNEL_BUFFERS_ALLOWED 1 - -#define SPI_DEV_ERROR_DETECT STD_ON -// Switches the Spi_GetHWUnitStatus function ON or OFF. -#define SPI_HW_STATUS_API STD_ON -// Switches the Interruptible Sequences handling functionality ON or OFF. -#define SPI_INTERRUPTIBLE_SEQ_ALLOWED STD_OFF - -// LEVEL 0 - Simple sync -// LEVEL 1 - Basic async -// LEVEL 2 - Enhanced mode -#define SPI_LEVEL_DELIVERED 2 - -#define SPI_VERSION_INFO_API STD_ON - -#if 0 -#if SPI_LEVEL_DELIVERED>=1 -#define SPI_INTERRUPTIBLE_SEQ_ALLOWED STD_ON -#endif -#endif - -// External devices -typedef enum { - SPI_device_1, -} Spi_ExternalDeviceTypeType; - -// Channels -#define SPI_CH_WREN 0 -#define SPI_CH_CMD 1 -#define SPI_CH_DATA 2 -#define SPI_CH_ADDR 3 - -// Jobs -#define SPI_JOB_CMD2 0 -#define SPI_JOB_DATA 1 -#define SPI_JOB_CMD 2 -#define SPI_JOB_WREN 3 - -// Sequences -#define SPI_SEQ_CMD 0 -#define SPI_SEQ_WRITE 1 -#define SPI_SEQ_READ 2 -#define SPI_SEQ_CMD2 3 - - -#define SPI_MAX_JOB 4 -#define SPI_MAX_CHANNEL 4 -#define SPI_MAX_SEQUENCE 4 - -#define SPI_USE_HW_UNIT_0 STD_ON -#define SPI_USE_HW_UNIT_1 STD_OFF -#define SPI_USE_HW_UNIT_2 STD_OFF -#define SPI_USE_HW_UNIT_3 STD_OFF - - -#endif /*SPI_CFG_H*/ diff --git a/boards/mpc5606s_xpc560s/config/Spi_Lcfg.c b/boards/mpc5606s_xpc560s/config/Spi_Lcfg.c deleted file mode 100644 index 36e91be0..00000000 --- a/boards/mpc5606s_xpc560s/config/Spi_Lcfg.c +++ /dev/null @@ -1,217 +0,0 @@ -/* -* Configuration of module: Spi (Spi_Lcfg.c) -* -* Created by: -* Copyright: -* -* Configured for (MCU): MPC560x -* -* Module vendor: ArcCore -* Generator version: 2.0.13 -* -* Generated by Arctic Studio (http://arccore.com) -* on Tue Jun 14 20:57:25 CEST 2011 -*/ - - - -#include "Spi.h" -#include "Spi_Cfg.h" -#include - - - -// SPI_0 -//#define SPI_0_CS 1 /* Using PCSB1 */ -#define SPI_0_CS 2 /* Using PCSB2 */ - - -#define SPI_SEQ_END_NOTIFICATION NULL -#define SPI_JOB_END_NOTIFICAITON NULL - -// Notifications -// Seq -#define SPI_SEQ_CMD_END_NOTIFICATION NULL -#define SPI_SEQ_WRITE_END_NOTIFICATION NULL -#define SPI_SEQ_READ_END_NOTIFICATION NULL -#define SPI_SEQ_CMD2_END_NOTIFICATION NULL -// Jobs -#define SPI_JOB_CMD2_END_NOTIFICATION NULL -#define SPI_JOB_DATA_END_NOTIFICATION NULL -#define SPI_JOB_CMD_END_NOTIFICATION NULL -#define SPI_JOB_WREN_END_NOTIFICATION NULL - - -/*************** Sequences **************/ -const Spi_SequenceConfigType SpiSequenceConfigData[] = -{ - { - .SpiSequenceId = SPI_SEQ_CMD, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_CMD_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_CMD, - (-1) - }, - }, - { - .SpiSequenceId = SPI_SEQ_WRITE, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_WRITE_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_WREN, - SPI_JOB_DATA, - (-1) - }, - }, - { - .SpiSequenceId = SPI_SEQ_READ, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_READ_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_DATA, - (-1) - }, - }, - { - .SpiSequenceId = SPI_SEQ_CMD2, - .SpiInterruptibleSequence = false, - .SpiSeqEndNotification = SPI_SEQ_CMD2_END_NOTIFICATION, - .JobAssignment = { - SPI_JOB_CMD2, - (-1) - }, - }, -}; - -/*************** Jobs **************/ -const Spi_JobConfigType SpiJobConfigData[] = -{ - { - .SpiJobId = SPI_JOB_CMD2, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_CMD2_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_CMD, - SPI_CH_DATA, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, - { - .SpiJobId = SPI_JOB_DATA, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_DATA_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_CMD, - SPI_CH_ADDR, - SPI_CH_DATA, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, - { - .SpiJobId = SPI_JOB_CMD, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_CMD_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_CMD, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, - { - .SpiJobId = SPI_JOB_WREN, - .SpiHwUnit = CSIB0, - .SpiJobPriority = 0,//NOT CONFIGURABLE IN TOOLS - .SpiJobEndNotification = SPI_JOB_WREN_END_NOTIFICATION, - .ChannelAssignment = { - SPI_CH_WREN, - (-1) - }, - .DeviceAssignment = SPI_device_1, - }, -}; - -uint32 Spi_GetJobCnt(void ) { return sizeof(SpiJobConfigData)/sizeof(SpiJobConfigData[0]); } - - -/*************** Channels **************/ -const Spi_ChannelConfigType SpiChannelConfigData[] = -{ - { - .SpiChannelId = SPI_CH_WREN, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 8, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 1, - .SpiDefaultData = 6, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = SPI_CH_CMD, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 8, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 64, - .SpiDefaultData = 0, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = SPI_CH_DATA, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 8, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 64, - .SpiDefaultData = 0, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = SPI_CH_ADDR, - .SpiChannelType = SPI_EB, - .SpiDataWidth = 16, - .SpiIbNBuffers = 0, - .SpiEbMaxLength = 64, - .SpiDefaultData = 0, - .SpiTransferStart = SPI_TRANSFER_START_MSB, - }, - { - .SpiChannelId = (-1), - } -}; - -uint32 Spi_GetChanneCnt(void ) { return sizeof(SpiChannelConfigData)/sizeof(SpiChannelConfigData[0]); } - -/*************** External Devices **************/ -const Spi_ExternalDeviceType SpiExternalConfigData[] = -{ - { - .SpiBaudrate = 100000UL, - .SpiCsIdentifier = 1, - .SpiCsPolarity = STD_LOW, - .SpiDataShiftEdge = SPI_EDGE_LEADING, - .SpiEnableCs = 0, // NOT SUPPORTED IN TOOLS - .SpiShiftClockIdleLevel = STD_LOW, - .SpiTimeClk2Cs = 606, // ns - .SpiTimeCs2Clk = 606, // ns - }, -}; - -uint32 Spi_GetExternalDeviceCnt(void ) { return sizeof(SpiExternalConfigData)/sizeof(SpiExternalConfigData[0]); } - - - -const Spi_DriverType SpiConfigData = -{ - .SpiMaxChannel = SPI_MAX_CHANNEL, - .SpiMaxJob = SPI_MAX_JOB, - .SpiMaxSequence = SPI_MAX_SEQUENCE, - .SpiChannelConfig = &SpiChannelConfigData[0], - .SpiSequenceConfig = &SpiSequenceConfigData[0], - .SpiJobConfig = &SpiJobConfigData[0], - .SpiExternalDevice = &SpiExternalConfigData[0], -}; - -- 2.39.2