-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#warning "This default file may only be used as an example!"\r
-\r
-#ifndef SPI_CFG_H_\r
-#define SPI_CFG_H_\r
+/*\r
+* Configuration of module: Spi (Spi_Cfg.h)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC560x\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.13\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+* on Tue Jun 14 20:57:25 CEST 2011\r
+*/\r
+\r
+
+\r
+#ifndef SPI_CFG_H\r
+#define SPI_CFG_H\r
\r
#include "Dma.h"\r
#include "mpc55xx.h"\r
#include "Mcu.h"\r
\r
-#define DSPI_CTRL_A 0\r
-#define DSPI_CTRL_B 1\r
-#define DSPI_CTRL_C 2\r
-#define DSPI_CTRL_D 3\r
-\r
/*\r
* General configuration\r
*/\r
\r
-// Maximum amount of data that can be written/read in one go.\r
-#define SPI_EB_MAX_LENGTH 64\r
-\r
// Switches the Spi_Cancel function ON or OFF.\r
-#define SPI_CANCEL_API STD_OFF\r
+#define SPI_CANCEL_API STD_ON\r
\r
// Selects the SPI Handler/Driver Channel Buffers usage allowed and delivered.\r
// LEVEL 0 - Only Internal buffers\r
// LEVEL 1 - Only external buffers\r
// LEVEL 2 - Both internal/external buffers\r
-#define SPI_CHANNEL_BUFFERS_ALLOWED 1\r
+#define SPI_CHANNEL_BUFFERS_ALLOWED 1\r
\r
-#define SPI_DEV_ERROR_DETECT STD_ON\r
+#define SPI_DEV_ERROR_DETECT STD_ON\r
// Switches the Spi_GetHWUnitStatus function ON or OFF.\r
#define SPI_HW_STATUS_API STD_ON\r
// Switches the Interruptible Sequences handling functionality ON or OFF.\r
// LEVEL 2 - Enhanced mode\r
#define SPI_LEVEL_DELIVERED 2\r
\r
-#define SPI_VERSION_INFO_API STD_ON\r
+#define SPI_VERSION_INFO_API STD_ON\r
\r
#if 0\r
#if SPI_LEVEL_DELIVERED>=1\r
#endif\r
#endif\r
\r
-// M95256\r
-#define E2_WREN 0x6 // Write Enable 0000 0110\r
-#define E2_WRDI 0x4 // Write Disable 0000 0100\r
-#define E2_RDSR 0x5 // Read Status Register 0000 0101\r
- // 1 - Read data\r
-#define E2_WRSR 0x1 // Write Status Register 0000 0001\r
- // 1 - Write data\r
-#define E2_READ 0x3 // Read from Memory Array 0000 0011\r
- // 1 - Write 16-bit address\r
- // n - 8 -bit read data\r
-#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010\r
- // 1 Write 16-bit address\r
- // n - 8-bit reads\r
-\r
-\r
-#define FLASH_READ_25 0x03\r
-#define FLASH_READ_50 0x0B\r
-#define FLASH_RDSR 0x05\r
-#define FLASH_JEDEC_ID 0x9f\r
-#define FLASH_RDID 0x90\r
-#define FLASH_BYTE_WRITE 0x02\r
-#define FLASH_AI_WORD_WRITE 0xad\r
-#define FLASH_WREN 0x06\r
-#define FLASH_WRDI 0x04\r
-#define FLASH_WRSR 0x01\r
-#define FLASH_ERASE_4K 0x20\r
-\r
-\r
-\r
-typedef enum\r
-{\r
- SPI_EB = 0, // External Buffer\r
- SPI_IB // Internal Buffer\r
-} Spi_BufferType;\r
-\r
+// External devices\r
typedef enum {\r
- SPI_EXT_DEVICE_A_E2,\r
- SPI_EXT_DEVICE_A_FLASH,\r
- SPI_EXT_DEVICE_B_E2,\r
+ SPI_device_1,\r
} Spi_ExternalDeviceTypeType;\r
\r
-typedef enum\r
-{\r
- SPI_CH_E2_CMD = 0,\r
- SPI_CH_E2_ADDR,\r
- SPI_CH_E2_WREN,\r
- SPI_CH_E2_DATA,\r
-\r
- SPI_CH_EEP_CMD,\r
- SPI_CH_EEP_ADDR,\r
- SPI_CH_EEP_WREN,\r
- SPI_CH_EEP_DATA,\r
-\r
- SPI_CH_FLASH_CMD,\r
- SPI_CH_FLASH_ADDR,\r
- SPI_CH_FLASH_DATA,\r
- SPI_CH_FLASH_WREN,\r
- SPI_CH_FLASH_WRDI,\r
- SPI_CH_FLASH_WRSR,\r
-\r
- SPI_MAX_CHANNEL,\r
-} Spi_ChannelType;\r
-\r
-typedef enum\r
-{\r
- SPI_JOB_E2_CMD = 0,\r
- SPI_JOB_E2_CMD2,\r
- SPI_JOB_E2_DATA,\r
- SPI_JOB_E2_WREN,\r
-\r
- SPI_JOB_EEP_CMD,\r
- SPI_JOB_EEP_CMD2,\r
- SPI_JOB_EEP_DATA,\r
- SPI_JOB_EEP_WREN,\r
-\r
- SPI_JOB_FLASH_CMD,\r
- SPI_JOB_FLASH_CMD2,\r
- SPI_JOB_FLASH_CMD_DATA,\r
- SPI_JOB_FLASH_READ,\r
- SPI_JOB_FLASH_WREN,\r
- SPI_JOB_FLASH_WRDI,\r
- SPI_JOB_FLASH_DATA,\r
- SPI_JOB_FLASH_WRSR,\r
- SPI_JOB_FLASH_ADDR,\r
-\r
- SPI_MAX_JOB,\r
-} Spi_JobType;\r
-\r
-#define SPI_MAX_CHANNELS 8\r
-\r
-typedef enum\r
-{\r
- SPI_SEQ_E2_CMD = 0,\r
- SPI_SEQ_E2_CMD2,\r
- SPI_SEQ_E2_READ,\r
- SPI_SEQ_E2_WRITE,\r
-\r
- SPI_SEQ_EEP_CMD,\r
- SPI_SEQ_EEP_CMD2,\r
- SPI_SEQ_EEP_READ,\r
- SPI_SEQ_EEP_WRITE,\r
-\r
- SPI_SEQ_FLASH_CMD,\r
- SPI_SEQ_FLASH_CMD2,\r
- SPI_SEQ_FLASH_CMD_DATA,\r
- SPI_SEQ_FLASH_READ,\r
- SPI_SEQ_FLASH_WRITE,\r
- SPI_SEQ_FLASH_WRSR,\r
- SPI_SEQ_FLASH_ERASE,\r
-\r
- SPI_MAX_SEQUENCE,\r
-} Spi_SequenceType;\r
-\r
-typedef enum\r
-{\r
- SPI_ARC_TRANSFER_START_LSB,\r
- SPI_ARC_TRANSFER_START_MSB,\r
-} Spi_Arc_TransferStartType;\r
-\r
-\r
-typedef enum {\r
- SPI_EDGE_LEADING,\r
- SPI_EDGE_TRAILING\r
-} Spi_EdgeType;\r
-\r
-\r
-\r
-// All data needed to configure one SPI-channel\r
-typedef struct\r
-{\r
- // Symbolic name\r
- Spi_ChannelType SpiChannelId;\r
- // Buffer usage with EB/IB channel\r
- // TODO: The type is wrong...\r
- unsigned SpiChannelType;\r
-\r
- // This parameter is the width of a transmitted data unit.\r
- uint32 SpiDataWidth;\r
- // This parameter is the default value to transmit.\r
- uint32 SpiDefaultData;\r
-\r
- // This parameter contains the maximum size of data buffers in case of EB\r
- // Channels and only.\r
- Spi_NumberOfDataType SpiEbMaxLength;\r
-\r
- // This parameter contains the maximum number of data buffers in case of IB\r
- // Channels and only.\r
- Spi_NumberOfDataType SpiIbNBuffers;\r
-\r
- // This parameter defines the first starting bit for transmission.\r
- Spi_Arc_TransferStartType SpiTransferStart;\r
-\r
- //\r
- _Bool SpiDmaNoIncreaseSrc;\r
-\r
-} Spi_ChannelConfigType;\r
+// Channels\r
+#define SPI_CH_WREN 0\r
+#define SPI_CH_CMD 1\r
+#define SPI_CH_DATA 2\r
+#define SPI_CH_ADDR 3\r
\r
-// All data needed to configure one SPI-Job, amongst others the connection\r
-// between the internal SPI unit and the special settings for an external de-\r
-// vice is done.\r
-typedef struct\r
-{\r
-\r
- Spi_JobType SpiJobId;\r
-\r
- // This parameter is the symbolic name to identify the HW SPI Hardware micro-\r
- // controller peripheral allocated to this Job.\r
- uint32 SpiHwUnit;\r
-\r
- // This parameter is a reference to a notification function.\r
- void (*SpiJobEndNotification)();\r
-\r
- // Priority of the Job\r
- // range 0..3\r
- unsigned SpiJobPriority;\r
-\r
- // A job references several channels.\r
- uint32 ChannelAssignment[SPI_MAX_CHANNELS];\r
-\r
- // Reference to the external device used by this job\r
- Spi_ExternalDeviceTypeType DeviceAssignment;\r
-\r
-// unsigned SPI_NUMBER_OF_CHANNELS;\r
-// unsigned SPI_LIST_OF_CHANNELS[SPI_MAX_CHANNEL];\r
-} Spi_JobConfigType;\r
-\r
-// The communication settings of an external device. Closely linked to Spi-\r
-// Job.\r
-typedef struct\r
-{\r
-\r
- // This parameter is the communication baudrate - This parameter allows\r
- // using a range of values, from the point of view of configuration tools, from\r
- // Hz up to MHz.\r
- // Note! Float in config case, not here\r
- uint32 SpiBaudrate;\r
-\r
- // Symbolic name to identify the CS used for this job\r
- uint32 SpiCsIdentifier;\r
-\r
- // This parameter defines the active polarity of Chip Select.\r
- // STD_HIGH or STD_LOW\r
- uint8 SpiCsPolarity;\r
-\r
- // This parameter defines the SPI data shift edge.\r
- Spi_EdgeType SpiDataShiftEdge;\r
-\r
- // This parameter enables or not the Chip Select handling functions.\r
- uint8 SpiEnableCs;\r
-\r
- // This parameter defines the SPI shift clock idle level.\r
- uint8 SpiShiftClockIdleLevel;\r
-\r
- // Timing between clock and chip select - This parameter allows to use a\r
- // range of values from 0 up to 100 microSec. the real configuration-value\r
- // used in software BSW-SPI is calculated out of this by the generator-tools\r
- // Note! Float in config case, not here. Unit ns\r
- uint32 SpiTimeClk2Cs;\r
-\r
- // Timing between PCS and first edge of SCK. Unit ns.\r
- uint32 SpiTimeCs2Clk;\r
-\r
- // ArcCore extension...\r
- // The controller ID(0..3)\r
- //uint32 SpiControllerId;\r
-\r
-} Spi_ExternalDeviceType;\r
-\r
-// All data needed to configure one SPI-sequence\r
-typedef struct\r
-{\r
- // This parameter allows or not this Sequence to be suspended by another\r
- // one.\r
- unsigned SpiInterruptibleSequence;\r
- // This parameter is a reference to a notification function.\r
- void (*SpiSeqEndNotification)();\r
- //\r
- Spi_SequenceType SpiSequenceId;\r
- // unsigned SPI_NUMBER_OF_JOBS;\r
- // A sequence references several jobs, which are executed during a commu-\r
- // nication sequence\r
- uint32 JobAssignment[SPI_MAX_JOB];\r
-} Spi_SequenceConfigType;\r
-\r
-typedef struct\r
-{\r
- /* Interrupt priority level for this SPI channel. */\r
- uint8 IsrPriority;\r
-\r
- /* This channel is to be activated for use. */\r
- uint8 Activated;\r
-\r
- /* Receive DMA channel. */\r
- Dma_ChannelType RxDmaChannel;\r
-\r
- /* Transmit DMA channel. */\r
- Dma_ChannelType TxDmaChannel;\r
-\r
- /* Peripheral clock source. */\r
- McuE_PeriperalClock_t PeripheralClock;\r
-}Spi_HwConfigType;\r
-\r
-typedef struct\r
-{\r
- // This parameter contains the number of Channels configured. It will be\r
- // gathered by tools during the configuration stage.\r
- uint8 SpiMaxChannel;\r
-\r
- uint8 SpiMaxJob;\r
-\r
- uint8 SpiMaxSequence;\r
-\r
- // All data needed to configure one SPI-channel\r
- const Spi_ChannelConfigType * SpiChannelConfig;\r
-\r
- // The communication settings of an external device. Closely\r
- // linked to SpiJob.\r
- const Spi_ExternalDeviceType * SpiExternalDevice;\r
-\r
- // All data needed to configure one SPI-Job, amongst others the\r
- // connection between the internal SPI unit and the special set-\r
- // tings for an external device is done.\r
- const Spi_JobConfigType * SpiJobConfig;\r
-\r
- // All data needed to configure one SPI-sequence\r
- const Spi_SequenceConfigType * SpiSequenceConfig;\r
-\r
- const Spi_HwConfigType *SpiHwConfig;\r
-} Spi_DriverType;\r
-\r
-typedef Spi_DriverType Spi_ConfigType;\r
-\r
-\r
-#if 0\r
-struct SpiDriverConfiguration_s\r
-{\r
- Spi_ChannelType SPI_MAX_CHANNEL;\r
- Spi_JobType SPI_MAX_JOB;\r
- Spi_SequenceType SPI_MAX_SEQUENCE;\r
-};\r
-#endif\r
-\r
-// This is implementation specific but not all values may be valid\r
-// within the type.This type shall be chosen in order to have the\r
-// most efficient implementation on a specific microcontroller\r
-// platform.\r
-// In-short: Type of application data buffer elements\r
-// The 5516 TXDATA is 16-bit.. fits ?\r
-\r
-typedef uint8 Spi_DataType;\r
-//typedef uint16 Spi_DataType;\r
-\r
-// Specifies the identification (ID) for a SPI Hardware microcontroller peripheral (unit).\r
-// SPI140: This type is configurable (On / Off) at pre-compile time. The switch\r
-// SPI_HW_STATUS_API shall activate or deactivate the declaration of this\r
-// type.\r
-typedef uint32 Spi_HWUnitType;\r
-\r
-#if 0\r
-typedef struct\r
-{\r
- Spi_SequenceConfigType SpiSequenceConfig;\r
- Spi_JobConfigType SpiJobConfig;\r
- Spi_ChannelConfigType SpiChannelConfig;\r
- Spi_ExternalDeviceType SpiExternalDevice;\r
-}Spi_ConfigType;\r
-#endif\r
+// Jobs\r
+#define SPI_JOB_CMD2 0 \r
+#define SPI_JOB_DATA 1 \r
+#define SPI_JOB_CMD 2 \r
+#define SPI_JOB_WREN 3 \r
\r
-extern const Spi_ConfigType SpiConfigData;\r
+// Sequences\r
+#define SPI_SEQ_CMD 0\r
+#define SPI_SEQ_WRITE 1\r
+#define SPI_SEQ_READ 2\r
+#define SPI_SEQ_CMD2 3\r
\r
\r
-uint32 Spi_GetJobCnt(void );\r
-uint32 Spi_GetChannelCnt(void );\r
-uint32 Spi_GetExternalDeviceCnt(void );\r
+#define SPI_MAX_JOB 4\r
+#define SPI_MAX_CHANNEL 4\r
+#define SPI_MAX_SEQUENCE 4\r
\r
+#define SPI_USE_HW_UNIT_0 STD_ON\r
+#define SPI_USE_HW_UNIT_1 STD_OFF\r
+#define SPI_USE_HW_UNIT_2 STD_OFF\r
+#define SPI_USE_HW_UNIT_3 STD_OFF\r
\r
\r
-#endif /*SPI_CFG_H_*/\r
+#endif /*SPI_CFG_H*/\r
projects / arc.git / blobdiff