mpc5567qrtech, updated examples.

[arc.git] / boards / mpc5567qrtech / examples / rte_simple / config / Rte_Type.h

diff --git a/boards/mpc5567qrtech/examples/rte_simple/config/Rte_Type.h b/boards/mpc5567qrtech/examples/rte_simple/config/Rte_Type.h
index a8fc8e57f92a452098aacad3602d526f71c3c1bd..ec7bb9aac67da9281ead8934121d3e5c63a6fc17 100644 (file)
--- a/boards/mpc5567qrtech/examples/rte_simple/config/Rte_Type.h
+++ b/boards/mpc5567qrtech/examples/rte_simple/config/Rte_Type.h
@@ -7,7 +7,7 @@
 * Configured for (MCU):    MPC5567\r
 *\r
 * Module vendor:           ArcCore\r
-* Generator version:       0.0.9\r
+* Generator version:       0.0.13\r
 *\r
 * Generated by Arctic Studio (http://arccore.com) \r
 */\r
@@ -25,10 +25,164 @@ typedef boolean Boolean;
 \r
 #define _DEFINED_TYPEDEF_FOR_Boolean_ \r
 \r
+typedef uint8 DigitalLevel;\r
+#ifndef Low\r
+#define Low ((DigitalLevel)0)\r
+#endif /*Low*/\r
+#ifndef High\r
+#define High ((DigitalLevel)1)\r
+#endif /*High*/\r
+#define DigitalLevel_LowerLimit 0\r
+#define DigitalLevel_UpperLimit 1\r
+\r
+#define _DEFINED_TYPEDEF_FOR_DigitalLevel_ \r
+\r
+typedef uint8 EcuM_BootTargetType;\r
+#ifndef ECUM_BOOT_TARGET_APP\r
+#define ECUM_BOOT_TARGET_APP ((EcuM_BootTargetType)0)\r
+#endif /*ECUM_BOOT_TARGET_APP*/\r
+#ifndef ECUM_BOOT_TARGET_OEM_BOOTLOADER\r
+#define ECUM_BOOT_TARGET_OEM_BOOTLOADER ((EcuM_BootTargetType)1)\r
+#endif /*ECUM_BOOT_TARGET_OEM_BOOTLOADER*/\r
+#ifndef ECUM_BOOT_TARGET_SYS_BOOTLOADER\r
+#define ECUM_BOOT_TARGET_SYS_BOOTLOADER ((EcuM_BootTargetType)2)\r
+#endif /*ECUM_BOOT_TARGET_SYS_BOOTLOADER*/\r
+#define EcuM_BootTargetType_LowerLimit 0\r
+#define EcuM_BootTargetType_UpperLimit 1\r
+\r
+#define _DEFINED_TYPEDEF_FOR_EcuM_BootTargetType_ \r
+\r
+typedef uint8 EcuM_StateType;\r
+#ifndef ECUM_STATE_STARTUP\r
+#define ECUM_STATE_STARTUP ((EcuM_StateType)16)\r
+#endif /*ECUM_STATE_STARTUP*/\r
+#ifndef ECUM_STATE_STARTUP_ONE\r
+#define ECUM_STATE_STARTUP_ONE ((EcuM_StateType)17)\r
+#endif /*ECUM_STATE_STARTUP_ONE*/\r
+#ifndef ECUM_STATE_STARTUP_TWO\r
+#define ECUM_STATE_STARTUP_TWO ((EcuM_StateType)18)\r
+#endif /*ECUM_STATE_STARTUP_TWO*/\r
+#ifndef ECUM_STATE_WAKEUP\r
+#define ECUM_STATE_WAKEUP ((EcuM_StateType)32)\r
+#endif /*ECUM_STATE_WAKEUP*/\r
+#ifndef ECUM_STATE_WAKEUP_ONE\r
+#define ECUM_STATE_WAKEUP_ONE ((EcuM_StateType)33)\r
+#endif /*ECUM_STATE_WAKEUP_ONE*/\r
+#ifndef ECUM_STATE_WAKEUP_VALIDATION\r
+#define ECUM_STATE_WAKEUP_VALIDATION ((EcuM_StateType)34)\r
+#endif /*ECUM_STATE_WAKEUP_VALIDATION*/\r
+#ifndef ECUM_STATE_WAKEUP_REACTION\r
+#define ECUM_STATE_WAKEUP_REACTION ((EcuM_StateType)35)\r
+#endif /*ECUM_STATE_WAKEUP_REACTION*/\r
+#ifndef ECUM_STATE_WAKEUP_TWO\r
+#define ECUM_STATE_WAKEUP_TWO ((EcuM_StateType)36)\r
+#endif /*ECUM_STATE_WAKEUP_TWO*/\r
+#ifndef ECUM_STATE_WAKEUP_WAKESLEEP\r
+#define ECUM_STATE_WAKEUP_WAKESLEEP ((EcuM_StateType)37)\r
+#endif /*ECUM_STATE_WAKEUP_WAKESLEEP*/\r
+#ifndef ECUM_STATE_WAKEUP_TTII\r
+#define ECUM_STATE_WAKEUP_TTII ((EcuM_StateType)38)\r
+#endif /*ECUM_STATE_WAKEUP_TTII*/\r
+#ifndef ECUM_STATE_RUN\r
+#define ECUM_STATE_RUN ((EcuM_StateType)48)\r
+#endif /*ECUM_STATE_RUN*/\r
+#ifndef ECUM_STATE_APP_RUN\r
+#define ECUM_STATE_APP_RUN ((EcuM_StateType)50)\r
+#endif /*ECUM_STATE_APP_RUN*/\r
+#ifndef ECUM_STATE_APP_POST_RUN\r
+#define ECUM_STATE_APP_POST_RUN ((EcuM_StateType)51)\r
+#endif /*ECUM_STATE_APP_POST_RUN*/\r
+#ifndef ECUM_STATE_SHUTDOWN\r
+#define ECUM_STATE_SHUTDOWN ((EcuM_StateType)64)\r
+#endif /*ECUM_STATE_SHUTDOWN*/\r
+#ifndef ECUM_STATE_PREP_SHUTDOWN\r
+#define ECUM_STATE_PREP_SHUTDOWN ((EcuM_StateType)68)\r
+#endif /*ECUM_STATE_PREP_SHUTDOWN*/\r
+#ifndef ECUM_STATE_GO_SLEEP\r
+#define ECUM_STATE_GO_SLEEP ((EcuM_StateType)73)\r
+#endif /*ECUM_STATE_GO_SLEEP*/\r
+#ifndef ECUM_STATE_GO_OFF_ONE\r
+#define ECUM_STATE_GO_OFF_ONE ((EcuM_StateType)77)\r
+#endif /*ECUM_STATE_GO_OFF_ONE*/\r
+#ifndef ECUM_STATE_GO_OFF_TWO\r
+#define ECUM_STATE_GO_OFF_TWO ((EcuM_StateType)78)\r
+#endif /*ECUM_STATE_GO_OFF_TWO*/\r
+#ifndef ECUM_STATE_SLEEP\r
+#define ECUM_STATE_SLEEP ((EcuM_StateType)80)\r
+#endif /*ECUM_STATE_SLEEP*/\r
+#ifndef ECUM_STATE_OFF\r
+#define ECUM_STATE_OFF ((EcuM_StateType)128)\r
+#endif /*ECUM_STATE_OFF*/\r
+#ifndef ECUM_STATE_RESET\r
+#define ECUM_STATE_RESET ((EcuM_StateType)144)\r
+#endif /*ECUM_STATE_RESET*/\r
+#define EcuM_StateType_LowerLimit 0x10\r
+#define EcuM_StateType_UpperLimit 0x90\r
+\r
+#define _DEFINED_TYPEDEF_FOR_EcuM_StateType_ \r
+\r
 typedef float Float;\r
 \r
 #define _DEFINED_TYPEDEF_FOR_Float_ \r
 \r
+typedef sint32 Hertz;\r
+#define Hertz_LowerLimit -2147483647\r
+#define Hertz_UpperLimit 2147483647\r
+\r
+#define _DEFINED_TYPEDEF_FOR_Hertz_ \r
+\r
+typedef uint16 IoHwAb_SignalType;\r
+#define IoHwAb_SignalType_LowerLimit 0\r
+#define IoHwAb_SignalType_UpperLimit 65535\r
+\r
+#define _DEFINED_TYPEDEF_FOR_IoHwAb_SignalType_ \r
+\r
+typedef sint32 MilliAmpere;\r
+#define MilliAmpere_LowerLimit -2147483647\r
+#define MilliAmpere_UpperLimit 2147483647\r
+\r
+#define _DEFINED_TYPEDEF_FOR_MilliAmpere_ \r
+\r
+typedef sint32 MilliOhm;\r
+#define MilliOhm_LowerLimit -2147483647\r
+#define MilliOhm_UpperLimit 2147483647\r
+\r
+#define _DEFINED_TYPEDEF_FOR_MilliOhm_ \r
+\r
+typedef sint32 MilliVolt;\r
+#define MilliVolt_LowerLimit -2147483647\r
+#define MilliVolt_UpperLimit 2147483647\r
+\r
+#define _DEFINED_TYPEDEF_FOR_MilliVolt_ \r
+\r
+typedef uint8 NvM_RequestResultType;\r
+#ifndef NVM_REQ_OK\r
+#define NVM_REQ_OK ((NvM_RequestResultType)0)\r
+#endif /*NVM_REQ_OK*/\r
+#ifndef NVM_REQ_NOT_OK\r
+#define NVM_REQ_NOT_OK ((NvM_RequestResultType)1)\r
+#endif /*NVM_REQ_NOT_OK*/\r
+#ifndef NVM_REQ_PENDING\r
+#define NVM_REQ_PENDING ((NvM_RequestResultType)2)\r
+#endif /*NVM_REQ_PENDING*/\r
+#ifndef NVM_REQ_INTEGRITY_FAILED\r
+#define NVM_REQ_INTEGRITY_FAILED ((NvM_RequestResultType)3)\r
+#endif /*NVM_REQ_INTEGRITY_FAILED*/\r
+#ifndef NVM_REQ_BLOCK_SKIPPED\r
+#define NVM_REQ_BLOCK_SKIPPED ((NvM_RequestResultType)4)\r
+#endif /*NVM_REQ_BLOCK_SKIPPED*/\r
+#ifndef NVM_REQ_NV_INVALIDATED\r
+#define NVM_REQ_NV_INVALIDATED ((NvM_RequestResultType)5)\r
+#endif /*NVM_REQ_NV_INVALIDATED*/\r
+\r
+#define _DEFINED_TYPEDEF_FOR_NvM_RequestResultType_ \r
+\r
+typedef sint32 Percent;\r
+#define Percent_LowerLimit -2147483647\r
+#define Percent_UpperLimit 2147483647\r
+\r
+#define _DEFINED_TYPEDEF_FOR_Percent_ \r
+\r
 typedef sint16 SInt16;\r
 #define SInt16_LowerLimit -32768\r
 #define SInt16_UpperLimit 32767\r
@@ -47,6 +201,24 @@ typedef sint8 SInt8;
 \r
 #define _DEFINED_TYPEDEF_FOR_SInt8_ \r
 \r
+typedef uint8 SignalQuality;\r
+#ifndef SignalQuality_InitialValue\r
+#define SignalQuality_InitialValue ((SignalQuality)0)\r
+#endif /*SignalQuality_InitialValue*/\r
+#ifndef SignalQuality_Error\r
+#define SignalQuality_Error ((SignalQuality)1)\r
+#endif /*SignalQuality_Error*/\r
+#ifndef SignalQuality_Bad\r
+#define SignalQuality_Bad ((SignalQuality)2)\r
+#endif /*SignalQuality_Bad*/\r
+#ifndef SignalQuality_Good\r
+#define SignalQuality_Good ((SignalQuality)3)\r
+#endif /*SignalQuality_Good*/\r
+#define SignalQuality_LowerLimit 0\r
+#define SignalQuality_UpperLimit 3\r
+\r
+#define _DEFINED_TYPEDEF_FOR_SignalQuality_ \r
+\r
 typedef uint16 UInt16;\r
 #define UInt16_LowerLimit 0\r
 #define UInt16_UpperLimit 65535\r
@@ -65,6 +237,10 @@ typedef uint8 UInt8;
 \r
 #define _DEFINED_TYPEDEF_FOR_UInt8_ \r
 \r
+typedef UInt8 DstPtrType[1024];\r
+\r
+#define _DEFINED_TYPEDEF_FOR_DstPtrType_ \r
+\r
 typedef struct {\r
        UInt8 value;\r
 } Rte_DE_Read_TesterRunnable_ReadArg1;\r
@@ -93,6 +269,23 @@ typedef struct {
        UInt16 value;\r
 } Rte_DE_Read_Logger2Runnable_ReadResult;\r
 \r
+typedef uint8 Rte_ModeType_EcuM_Mode;\r
+#define RTE_TRANSITION_EcuM_Mode ((Rte_ModeType_EcuM_Mode)6)\r
+#define RTE_MODE_EcuM_Mode_STARTUP ((Rte_ModeType_EcuM_Mode)4)\r
+#define RTE_MODE_EcuM_Mode_RUN ((Rte_ModeType_EcuM_Mode)1)\r
+#define RTE_MODE_EcuM_Mode_POST_RUN ((Rte_ModeType_EcuM_Mode)0)\r
+#define RTE_MODE_EcuM_Mode_SLEEP ((Rte_ModeType_EcuM_Mode)3)\r
+#define RTE_MODE_EcuM_Mode_WAKE_SLEEP ((Rte_ModeType_EcuM_Mode)5)\r
+#define RTE_MODE_EcuM_Mode_SHUTDOWN ((Rte_ModeType_EcuM_Mode)2)\r
+\r
+typedef uint8 Rte_ModeType_WdgMMode;\r
+#define RTE_TRANSITION_WdgMMode ((Rte_ModeType_WdgMMode)5)\r
+#define RTE_MODE_WdgMMode_ALIVE_OK ((Rte_ModeType_WdgMMode)3)\r
+#define RTE_MODE_WdgMMode_ALIVE_FAILED ((Rte_ModeType_WdgMMode)2)\r
+#define RTE_MODE_WdgMMode_ALIVE_EXPIRED ((Rte_ModeType_WdgMMode)1)\r
+#define RTE_MODE_WdgMMode_ALIVE_STOPPED ((Rte_ModeType_WdgMMode)4)\r
+#define RTE_MODE_WdgMMode_ALIVE_DEACTIVATED ((Rte_ModeType_WdgMMode)0)\r
+\r
 typedef struct {\r
 } Rte_PDS_Calculator_CalculatorOperations_P;\r
 typedef struct {\r