1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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18 //#include "System.h"
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19 #include "mpc55xx.h"
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20 #include "Modules.h"
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29 /* Uncomment and use DMA for 5606 only if you now what you are doing */
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30 #define DONT_USE_DMA_IN_ADC_MPC560X
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32 /* Are we gonna use Dma? */
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33 #if ( !defined(CFG_MPC560X) || \
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34 ( defined(CFG_MPC5606S) && !defined(DONT_USE_DMA_IN_ADC_MPC560X) ) )
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35 #define ADC_USES_DMA
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39 #if ( defined(ADC_USES_DMA) && !defined(USE_DMA) )
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40 #error Adc is configured to use Dma but the module is not enabled.
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43 #define ADC_GROUP0 0
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45 #if !defined(CFG_MPC560X)
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56 vuint32_t ADC_REG:16;
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57 vuint32_t ADC_REG_ADDR:8;
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59 }Adc_RegisterWriteType;
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71 vuint32_t MESSAGE_TAG:4;
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73 vuint32_t ADC_REG_ADDR:8;
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75 }Adc_RegisterReadType;
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85 ADC_EQADC_NBR_OF_QUEUES
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86 }Adc_eQADCQueueType;
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90 EQADC_CFIFO_STATUS_IDLE = 0,
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91 EQADC_CFIFO_STATUS_WAITINGFOR_TRIGGER = 0x2,
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92 EQADC_CFIFO_STATUS_TRIGGERED = 0x3
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93 }Adc_EQADCQueueStatusType;
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95 typedef int16_t Adc_EQADCRegister;
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104 }Adc_EQADCRegisterType;
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106 /* Command queue for calibration sequence. See 31.5.6 in reference manual. */
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107 const Adc_CommandType AdcCalibrationCommandQueue [] =
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109 /* Four samples of 25 % of (VRh - VRl). */
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111 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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112 .B.CHANNEL_NUMBER = 44
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115 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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116 .B.CHANNEL_NUMBER = 44
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119 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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120 .B.CHANNEL_NUMBER = 44
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123 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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124 .B.CHANNEL_NUMBER = 44
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126 /* Four samples of 75 % of (VRh - VRl). */
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128 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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129 .B.CHANNEL_NUMBER = 43
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132 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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133 .B.CHANNEL_NUMBER = 43
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136 .B.EOQ = 0, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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137 .B.CHANNEL_NUMBER = 43
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140 .B.EOQ = 1, .B.PAUSE = 0, .B.BN = 0, .B.CAL = 0, .B.MESSAGE_TAG = 0, .B.LST = ADC_CONVERSION_TIME_128_CLOCKS, .B.TSR = 0, .B.FMT = 0,
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141 .B.CHANNEL_NUMBER = 43
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145 /* DMA configuration for calibration sequence. */
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146 const Dma_TcdType AdcCalibrationDMACommandConfig =
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148 .SADDR = (uint32_t)AdcCalibrationCommandQueue,
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150 .SSIZE = DMA_TRANSFER_SIZE_32BITS,
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152 .DSIZE = DMA_TRANSFER_SIZE_32BITS,
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153 .SOFF = sizeof(Adc_CommandType),
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154 .NBYTESu.B.NBYTES = sizeof(Adc_CommandType),
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156 .DADDR = (vint32_t)&EQADC.CFPR[0].R,
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175 const Dma_TcdType AdcCalibrationDMAResultConfig =
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177 .SADDR = (vint32_t)&EQADC.RFPR[0].R + 2,
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179 .SSIZE = DMA_TRANSFER_SIZE_16BITS,
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181 .DSIZE = DMA_TRANSFER_SIZE_16BITS,
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183 .NBYTESu.B.NBYTES = sizeof(Adc_ValueGroupType),
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185 .DADDR = 0, /* Dynamic address, written later. */
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188 .DOFF = sizeof(Adc_ValueGroupType),
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211 /* Function prototypes. */
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212 #if defined(CFG_MPC560X)
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213 static void Adc_ConfigureADC (const Adc_ConfigType *ConfigPtr);
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214 static void Adc_ConfigureADCInterrupts (void);
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216 static void Adc_ConfigureEQADC (const Adc_ConfigType *ConfigPtr);
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217 static void Adc_ConfigureEQADCInterrupts (void);
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218 static void Adc_EQADCCalibrationSequence (void);
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219 static void Adc_WriteEQADCRegister (Adc_EQADCRegisterType reg, Adc_EQADCRegister value);
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220 static Adc_EQADCRegister Adc_ReadEQADCRegister (Adc_EQADCRegisterType reg);
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223 void Adc_GroupConversionComplete (Adc_GroupType group);
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225 /* Development error checking. */
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226 static Std_ReturnType Adc_CheckReadGroup (Adc_GroupType group);
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227 static Std_ReturnType Adc_CheckStartGroupConversion (Adc_GroupType group);
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228 static Std_ReturnType Adc_CheckStopGroupConversion (Adc_GroupType group);
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229 static Std_ReturnType Adc_CheckInit (const Adc_ConfigType *ConfigPtr);
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230 #if (ADC_DEINIT_API == STD_ON)
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231 static Std_ReturnType Adc_CheckDeInit (void);
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233 static Std_ReturnType Adc_CheckSetupResultBuffer (Adc_GroupType group);
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234 static Std_ReturnType Adc_CheckGetStreamLastPointer (Adc_GroupType group);
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236 /* static variable declarations */
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237 static Adc_StateType adcState = ADC_UNINIT;
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238 static const Adc_ConfigType *AdcConfigPtr; /* Pointer to configuration structure. */
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240 /* Validate functions used for development error check */
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241 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
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242 Std_ReturnType ValidateInit(Adc_APIServiceIDType api)
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244 Std_ReturnType res = E_OK;
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245 if(!(ADC_INIT == adcState)) {
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246 Det_ReportError(MODULE_ID_ADC,0,api,ADC_E_UNINIT );
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251 Std_ReturnType ValidateGroup(Adc_GroupType group,Adc_APIServiceIDType api)
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253 Std_ReturnType res = E_OK;
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254 if(!((group >= 0) && (group < AdcConfig->nbrOfGroups))) {
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255 Det_ReportError(MODULE_ID_ADC,0,api,ADC_E_PARAM_GROUP );
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262 #if (ADC_DEINIT_API == STD_ON)
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263 Std_ReturnType Adc_DeInit (const Adc_ConfigType *ConfigPtr)
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266 #if defined(CFG_MPC560X)
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268 if (E_OK == Adc_CheckDeInit())
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270 for(Adc_GroupType group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
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272 /* Set group status to idle. */
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273 AdcConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
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276 /* Disable DMA transfer*/
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277 #ifndef CFG_MPC5604B
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278 ADC_0.DMAE.B.DMAEN = 0;
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280 /* Power down ADC */
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281 ADC_0.MCR.R = 0x0001;
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283 /* Disable all interrupt*/
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286 /* Clean internal status. */
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287 AdcConfigPtr = (Adc_ConfigType *)NULL;
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288 adcState = ADC_UNINIT;
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295 Adc_eQADCQueueType queue;
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296 Adc_GroupType group;
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297 boolean queueStopped;
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299 if (E_OK == Adc_CheckDeInit())
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301 /* Stop all queues. */
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302 for (queue = ADC_EQADC_QUEUE_0; queue < ADC_EQADC_NBR_OF_QUEUES; queue++)
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304 /* Disable queue. */
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305 EQADC.CFCR[queue].B.MODE = 0;
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307 /* Wait for queue to enter idle state. */
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308 queueStopped = FALSE;
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309 /* TODO replace switch with bit pattern. */
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310 while (!queueStopped)
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314 case ADC_EQADC_QUEUE_0:
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315 queueStopped = (EQADC.CFSR.B.CFS0 == EQADC_CFIFO_STATUS_IDLE);
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317 case ADC_EQADC_QUEUE_1:
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318 queueStopped = (EQADC.CFSR.B.CFS1 == EQADC_CFIFO_STATUS_IDLE);
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320 case ADC_EQADC_QUEUE_2:
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321 queueStopped = (EQADC.CFSR.B.CFS2 == EQADC_CFIFO_STATUS_IDLE);
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323 case ADC_EQADC_QUEUE_3:
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324 queueStopped = (EQADC.CFSR.B.CFS3 == EQADC_CFIFO_STATUS_IDLE);
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326 case ADC_EQADC_QUEUE_4:
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327 queueStopped = (EQADC.CFSR.B.CFS4 == EQADC_CFIFO_STATUS_IDLE);
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329 case ADC_EQADC_QUEUE_5:
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330 queueStopped = (EQADC.CFSR.B.CFS5 == EQADC_CFIFO_STATUS_IDLE);
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333 /* We should never get here... Terminate loop. */
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334 queueStopped = TRUE;
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339 /* Disable eDMA requests for commands and results. */
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340 EQADC.IDCR[queue].B.CFFS = 0;
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341 EQADC.IDCR[queue].B.RFDS = 0;
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343 /* Disable FIFO fill requests. */
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344 EQADC.IDCR[queue].B.CFFE = 0;
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345 EQADC.IDCR[queue].B.RFDE = 0;
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347 /* Disable interrupts. */
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348 EQADC.IDCR[queue].B.RFOIE = 0;
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349 EQADC.IDCR[queue].B.CFUIE = 0;
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350 EQADC.IDCR[queue].B.TORIE = 0;
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351 EQADC.IDCR[queue].B.EOQIE = 0;
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354 /* Stop all DMA channels connected to EQADC. */
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355 for (group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
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357 Dma_StopChannel (AdcConfigPtr->groupConfigPtr [group].dmaCommandChannel);
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358 Dma_StopChannel (AdcConfigPtr->groupConfigPtr [group].dmaResultChannel);
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360 /* Set group status to idle. */
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361 AdcConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
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364 /* Disable EQADC. */
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365 Adc_WriteEQADCRegister (ADC0_CR, 0);
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367 /* Clean internal status. */
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368 AdcConfigPtr = (Adc_ConfigType *)NULL;
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369 adcState = ADC_UNINIT;
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372 #endif /* ENDOF defined(CFG_MPC560X) */
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376 Std_ReturnType Adc_Init (const Adc_ConfigType *ConfigPtr)
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378 #if defined(CFG_MPC560X)
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380 if (E_OK == Adc_CheckInit(ConfigPtr))
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382 /* First of all, store the location of the configuration data. */
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383 AdcConfigPtr = ConfigPtr;
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386 Adc_ConfigureADC(ConfigPtr);
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388 Adc_ConfigureADCInterrupts();
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390 /* Move on to INIT state. */
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391 adcState = ADC_INIT;
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401 Std_ReturnType returnValue;
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402 Adc_InternalChannelIdType channel;
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403 Adc_InternalChannelIdType channelId;
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404 Adc_GroupType group;
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405 Adc_CommandType *commandQueue;
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406 Adc_CommandType command;
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408 if (E_OK == Adc_CheckInit(ConfigPtr))
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410 /* First of all, store the location of the configuration data. */
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411 AdcConfigPtr = ConfigPtr;
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413 /* Start configuring the eQADC queues. */
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414 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
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416 /* Loop through all channels and make the command queue. */
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417 for (channel = 0; channel < ConfigPtr->groupConfigPtr[group].numberOfChannels; channel++)
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419 /* Get physical channel. */
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420 channelId = ConfigPtr->groupConfigPtr[group].channelList[channel];
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422 commandQueue = ConfigPtr->groupConfigPtr[group].commandBuffer;
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424 /* Begin with empty command. */
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427 /* Physical channel number. */
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428 command.B.CHANNEL_NUMBER = channelId;
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430 command.B.LST = ConfigPtr->channelConfigPtr [channel].adcChannelConvTime;
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431 /* Calibration feature. */
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432 command.B.CAL = ConfigPtr->channelConfigPtr [channel].adcChannelCalibrationEnable;
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433 /* Result buffer FIFO. The number of groups must not be greater than the number of queues. */
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434 command.B.MESSAGE_TAG = group;
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436 /* Write command to command queue. */
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437 commandQueue [channel].R = command.R;
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439 /* Last channel in group. Write EOQ and configure eQADC FIFO. */
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440 if (channel == (ConfigPtr->groupConfigPtr[group].numberOfChannels - 1))
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442 commandQueue [channel].B.EOQ = 1;
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448 Adc_ConfigureEQADC (ConfigPtr);
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450 /* Perform calibration of the ADC. */
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451 Adc_EQADCCalibrationSequence ();
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453 /* Configure DMA channels. */
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454 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
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457 ConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
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459 Dma_ConfigureChannel ((Dma_TcdType *)ConfigPtr->groupConfigPtr [group].groupDMAResults, ConfigPtr->groupConfigPtr [group].dmaResultChannel);
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460 Dma_ConfigureChannel ((Dma_TcdType *)ConfigPtr->groupConfigPtr [group].groupDMACommands, ConfigPtr->groupConfigPtr [group].dmaCommandChannel);
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463 /* Start DMA channels. */
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464 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
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466 /* Invalidate queues. */
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467 EQADC.CFCR[group].B.CFINV = 1;
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469 Dma_StartChannel (ConfigPtr->groupConfigPtr [group].dmaResultChannel);
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470 Dma_StartChannel (ConfigPtr->groupConfigPtr [group].dmaCommandChannel);
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473 Adc_ConfigureEQADCInterrupts ();
\r
475 /* Move on to INIT state. */
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476 adcState = ADC_INIT;
\r
477 returnValue = E_OK;
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481 returnValue = E_NOT_OK;
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484 return (returnValue);
\r
488 Std_ReturnType Adc_SetupResultBuffer (Adc_GroupType group, Adc_ValueGroupType *bufferPtr)
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490 Std_ReturnType returnValue = E_NOT_OK;
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492 /* Check for development errors. */
\r
493 if (E_OK == Adc_CheckSetupResultBuffer (group))
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495 AdcConfigPtr->groupConfigPtr[group].status->resultBufferPtr = bufferPtr;
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497 returnValue = E_OK;
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500 return (returnValue);
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503 Adc_StreamNumSampleType Adc_GetStreamLastPointer(Adc_GroupType group, Adc_ValueGroupType** PtrToSamplePtr)
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505 Adc_StreamNumSampleType nofSample = 0;
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506 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
509 /* Check for development errors. */
\r
510 if ( (E_OK == Adc_CheckGetStreamLastPointer (group)) &&
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511 (groupPtr->status->groupStatus != ADC_BUSY) )
\r
513 /* Set resultPtr to application buffer. */
\r
514 if(groupPtr->status->currSampleCount > 0){
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515 *PtrToSamplePtr = &groupPtr->status->resultBufferPtr[groupPtr->status->currSampleCount-1];
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518 if ((ADC_CONV_MODE_ONESHOT == groupPtr->conversionMode) &&
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519 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
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521 /** @req ADC327. */
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522 groupPtr->status->groupStatus = ADC_IDLE;
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524 else if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
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525 (ADC_ACCESS_MODE_STREAMING == groupPtr->accessMode) &&
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526 (ADC_STREAM_BUFFER_LINEAR == groupPtr->streamBufferMode) &&
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527 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
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529 /** @req ADC327. */
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530 groupPtr->status->groupStatus = ADC_IDLE;
\r
532 else if ( (ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
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533 ((ADC_STREAM_COMPLETED == groupPtr->status->groupStatus) ||
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534 (ADC_COMPLETED == groupPtr->status->groupStatus)) )
\r
536 /* Restart continous mode, and reset result buffer */
\r
537 if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
\r
538 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
\r
540 /* Start continous conversion again */
\r
541 Adc_StartGroupConversion(group);
\r
546 else{/* Keep status. */}
\r
550 /* Some condition not met */
\r
551 *PtrToSamplePtr = NULL;
\r
558 #if (ADC_READ_GROUP_API == STD_ON)
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559 Std_ReturnType Adc_ReadGroup (Adc_GroupType group, Adc_ValueGroupType *dataBufferPtr)
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561 Std_ReturnType returnValue = E_OK;
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563 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
565 if (E_OK == Adc_CheckReadGroup (group))
\r
567 /* Copy the result to application buffer. */
\r
568 for (channel = 0; channel < groupPtr->numberOfChannels; channel++)
\r
570 if(groupPtr->status->currSampleCount > 0){
\r
571 dataBufferPtr[channel] = (&(groupPtr->status->resultBufferPtr[groupPtr->status->currSampleCount-1]))[channel];
\r
573 dataBufferPtr[channel] = groupPtr->status->resultBufferPtr[channel];
\r
577 if ((ADC_CONV_MODE_ONESHOT == groupPtr->conversionMode) &&
\r
578 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
\r
580 /** @req ADC330. */
\r
581 groupPtr->status->groupStatus = ADC_IDLE;
\r
583 else if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
\r
584 (ADC_STREAM_BUFFER_LINEAR == groupPtr->streamBufferMode) &&
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585 (ADC_ACCESS_MODE_STREAMING == groupPtr->accessMode) &&
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586 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
\r
588 /** @req ADC330. */
\r
589 groupPtr->status->groupStatus = ADC_IDLE;
\r
591 else if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
\r
592 ((ADC_STREAM_COMPLETED == groupPtr->status->groupStatus) ||
\r
593 (ADC_COMPLETED == groupPtr->status->groupStatus)))
\r
596 /* Restart continous mode, and reset result buffer */
\r
597 if ((ADC_CONV_MODE_CONTINOUS == groupPtr->conversionMode) &&
\r
598 (ADC_STREAM_COMPLETED == groupPtr->status->groupStatus))
\r
600 /* Start continous conversion again */
\r
601 Adc_StartGroupConversion(group);
\r
606 else{/* Keep status. */}
\r
610 /* An error have been raised from Adc_CheckReadGroup(). */
\r
611 returnValue = E_NOT_OK;
\r
614 return (returnValue);
\r
618 Adc_StatusType Adc_GetGroupStatus (Adc_GroupType group)
\r
620 Adc_StatusType returnValue;
\r
622 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
623 if( (ValidateInit(ADC_GETGROUPSTATUS_ID) == E_NOT_OK) ||
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624 (ValidateGroup(group, ADC_GETGROUPSTATUS_ID) == E_NOT_OK))
\r
626 returnValue = ADC_IDLE;
\r
630 returnValue = AdcConfigPtr->groupConfigPtr[group].status->groupStatus;
\r
633 returnValue = AdcConfigPtr->groupConfigPtr[group].status->groupStatus;
\r
635 return (returnValue);
\r
638 void Adc_GroupConversionComplete (Adc_GroupType group)
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640 Adc_GroupDefType *adcGroup = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
642 if(ADC_ACCESS_MODE_SINGLE == adcGroup->accessMode )
\r
644 adcGroup->status->groupStatus = ADC_STREAM_COMPLETED;
\r
645 /* Call notification if enabled. */
\r
646 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
647 if (adcGroup->status->notifictionEnable && adcGroup->groupCallback != NULL)
\r
649 adcGroup->groupCallback();
\r
652 #if defined(CFG_MPC560X)
\r
653 /* Disable trigger normal conversions for ADC0 */
\r
654 ADC_0.MCR.B.NSTART=0;
\r
656 /* Disable trigger. */
\r
657 EQADC.CFCR[group].B.MODE = 0;
\r
662 if(ADC_STREAM_BUFFER_LINEAR == adcGroup->streamBufferMode)
\r
664 adcGroup->status->currSampleCount++;
\r
665 if(adcGroup->status->currSampleCount < adcGroup->streamNumSamples)
\r
667 adcGroup->status->currResultBufPtr += adcGroup->numberOfChannels;
\r
668 adcGroup->status->groupStatus = ADC_COMPLETED;
\r
670 #if defined (ADC_USES_DMA)
\r
671 /* Increase current result buffer ptr */
\r
672 Dma_ConfigureDestinationAddress((uint32_t)adcGroup->status->currResultBufPtr, adcGroup->dmaResultChannel);
\r
675 #if defined(CFG_MPC560X)
\r
676 ADC_0.IMR.B.MSKECH = 1;
\r
677 ADC_0.MCR.B.NSTART=1;
\r
679 /* Set single scan enable bit */
\r
680 EQADC.CFCR[group].B.SSE = 1;
\r
685 /* All sample completed. */
\r
686 adcGroup->status->groupStatus = ADC_STREAM_COMPLETED;
\r
688 /* Call notification if enabled. */
\r
689 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
690 if (adcGroup->status->notifictionEnable && adcGroup->groupCallback != NULL){
\r
691 adcGroup->groupCallback();
\r
694 #if defined(CFG_MPC560X)
\r
695 /* Disable trigger normal conversions for ADC0 */
\r
696 ADC_0.MCR.B.NSTART=0;
\r
698 /* Disable trigger. */
\r
699 EQADC.CFCR[group].B.MODE = 0;
\r
703 else if(ADC_STREAM_BUFFER_CIRCULAR == adcGroup->streamBufferMode)
\r
705 adcGroup->status->currSampleCount++;
\r
706 if(adcGroup->status->currSampleCount < adcGroup->streamNumSamples)
\r
708 adcGroup->status->currResultBufPtr += adcGroup->numberOfChannels;
\r
709 #if defined (ADC_USES_DMA)
\r
710 /* Increase current result buffer ptr */
\r
711 Dma_ConfigureDestinationAddress((uint32_t)adcGroup->status->currResultBufPtr, adcGroup->dmaResultChannel);
\r
713 adcGroup->status->groupStatus = ADC_COMPLETED;
\r
715 #if defined(CFG_MPC560X)
\r
716 ADC_0.IMR.B.MSKECH = 1;
\r
717 ADC_0.MCR.B.NSTART=1;
\r
719 /* Set single scan enable bit */
\r
720 EQADC.CFCR[group].B.SSE = 1;
\r
725 /* Sample completed. */
\r
726 #if defined(CFG_MPC560X)
\r
727 /* Disable trigger normal conversions for ADC*/
\r
728 ADC_0.MCR.B.NSTART=0;
\r
730 /* Disable trigger. */
\r
731 EQADC.CFCR[group].B.MODE = 0;
\r
733 adcGroup->status->groupStatus = ADC_STREAM_COMPLETED;
\r
734 /* Call notification if enabled. */
\r
735 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
736 if (adcGroup->status->notifictionEnable && adcGroup->groupCallback != NULL)
\r
738 adcGroup->groupCallback();
\r
749 #if defined(CFG_MPC560X)
\r
750 void Adc_Group0ConversionComplete (void)
\r
752 /* Clear ECH Flag and disable interruput */
\r
753 ADC_0.ISR.B.ECH = 1;
\r
754 ADC_0.IMR.B.MSKECH = 0;
\r
756 // Check which group is busy, only one is allowed to be busy at a time in a hw unit
\r
757 for (int group = 0; group < ADC_NBR_OF_GROUPS; group++)
\r
759 if((AdcConfigPtr->groupConfigPtr[group].status->groupStatus == ADC_BUSY) ||
\r
760 (AdcConfigPtr->groupConfigPtr[group].status->groupStatus == ADC_COMPLETED))
\r
762 #if !defined (ADC_USES_DMA)
\r
763 /* Copy to result buffer */
\r
764 for(uint8 index=0; index < AdcConfigPtr->groupConfigPtr[group].numberOfChannels; index++)
\r
766 #if defined(CFG_MPC5606S)
\r
767 AdcConfigPtr->groupConfigPtr[group].status->currResultBufPtr[index] = ADC_0.CDR[32+AdcConfigPtr->groupConfigPtr[group].channelList[index]].B.CDATA;
\r
769 AdcConfigPtr->groupConfigPtr[group].status->currResultBufPtr[index] = ADC_0.CDR[AdcConfigPtr->groupConfigPtr[group].channelList[index]].B.CDATA;
\r
774 Adc_GroupConversionComplete((Adc_GroupType)group);
\r
780 void Adc_WatchdogError (void){
\r
782 void Adc_ADCError (void){
\r
785 static void Adc_ConfigureADC (const Adc_ConfigType *ConfigPtr)
\r
787 /* Set ADC CLOCK */
\r
788 ADC_0.MCR.B.ADCLKSEL = ConfigPtr->hwConfigPtr->adcPrescale;
\r
790 ADC_0.DSDR.B.DSD = 254;
\r
793 ADC_0.MCR.B.PWDN = 0;
\r
795 #if defined(ADC_USES_DMA)
\r
797 ADC_0.DMAE.B.DMAEN = 1;
\r
801 void Adc_ConfigureADCInterrupts (void)
\r
803 ISR_INSTALL_ISR2( "Adc_Err", Adc_ADCError, ADC_ER_INT, 2, 0 );
\r
804 ISR_INSTALL_ISR2( "Adc_Grp", Adc_Group0ConversionComplete, ADC_EOC_INT, 2, 0 );
\r
805 ISR_INSTALL_ISR2( "Adc_Wdg", Adc_WatchdogError, ADC_WD_INT, 2, 0 );
\r
808 #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
\r
809 void Adc_StartGroupConversion (Adc_GroupType group)
\r
811 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
813 /* Run development error check. */
\r
814 if (E_OK == Adc_CheckStartGroupConversion (group))
\r
816 /* Disable trigger normal conversions for ADC0 */
\r
817 ADC_0.MCR.B.NSTART = 0;
\r
819 /* Set group state to BUSY. */
\r
820 groupPtr->status->groupStatus = ADC_BUSY;
\r
822 groupPtr->status->currSampleCount = 0;
\r
823 groupPtr->status->currResultBufPtr = groupPtr->status->resultBufferPtr; /* Set current result buffer */
\r
825 #if defined(ADC_USES_DMA)
\r
826 Dma_ConfigureChannel ((Dma_TcdType *)groupPtr->groupDMAResults, groupPtr->dmaResultChannel);
\r
827 Dma_ConfigureDestinationAddress ((uint32_t)groupPtr->status->currResultBufPtr, groupPtr->dmaResultChannel);
\r
829 /* Always use single shot in streaming mode */
\r
830 if( groupPtr->accessMode == ADC_ACCESS_MODE_STREAMING)
\r
832 /* Set conversion mode. */
\r
833 ADC_0.MCR.B.MODE = ADC_CONV_MODE_ONESHOT;
\r
837 /* Set conversion mode. */
\r
838 ADC_0.MCR.B.MODE = groupPtr->conversionMode;
\r
841 /* Enable Overwrite*/
\r
842 ADC_0.MCR.B.OWREN = 1;
\r
844 /* Set Conversion Time. */
\r
845 #if defined(CFG_MPC5606S)
\r
846 uint32 groupChannelIdMask = 0;
\r
848 ADC_0.CTR[1].B.INPLATCH = groupPtr->adcChannelConvTime.INPLATCH;
\r
849 ADC_0.CTR[1].B.INPCMP = groupPtr->adcChannelConvTime.INPCMP;
\r
850 ADC_0.CTR[1].B.INPSAMP = groupPtr->adcChannelConvTime.INPSAMP;
\r
852 for(uint8 i =0; i < groupPtr->numberOfChannels; i++)
\r
854 groupChannelIdMask |= (1 << groupPtr->channelList[i]);
\r
857 #if defined(ADC_USES_DMA)
\r
858 ADC_0.DMAE.R = 0x01;
\r
859 /* Enable DMA Transfer */
\r
860 ADC_0.DMAR[1].R = groupChannelIdMask;
\r
861 Dma_StartChannel(DMA_ADC_GROUP0_RESULT_CHANNEL); /* Enable EDMA channel for ADC */
\r
864 /* Enable Normal conversion */
\r
865 ADC_0.NCMR[1].R = groupChannelIdMask;
\r
867 /* Enable Channel Interrupt */
\r
868 ADC_0.CIMR[1].R = groupChannelIdMask;
\r
871 uint32 groupChannelIdMask[3] = {0,0,0};
\r
873 ADC_0.CTR[0].B.INPLATCH = groupPtr->adcChannelConvTime.INPLATCH;
\r
874 ADC_0.CTR[0].B.INPCMP = groupPtr->adcChannelConvTime.INPCMP;
\r
875 ADC_0.CTR[0].B.INPSAMP = groupPtr->adcChannelConvTime.INPSAMP;
\r
876 ADC_0.CTR[1].B.INPLATCH = groupPtr->adcChannelConvTime.INPLATCH;
\r
877 ADC_0.CTR[1].B.INPCMP = groupPtr->adcChannelConvTime.INPCMP;
\r
878 ADC_0.CTR[1].B.INPSAMP = groupPtr->adcChannelConvTime.INPSAMP;
\r
879 ADC_0.CTR[2].B.INPLATCH = groupPtr->adcChannelConvTime.INPLATCH;
\r
880 ADC_0.CTR[2].B.INPCMP = groupPtr->adcChannelConvTime.INPCMP;
\r
881 ADC_0.CTR[2].B.INPSAMP = groupPtr->adcChannelConvTime.INPSAMP;
\r
883 for(uint8 i =0; i < groupPtr->numberOfChannels; i++)
\r
885 if(groupPtr->channelList[i] <= 15){
\r
886 groupChannelIdMask[0] |= (1 << groupPtr->channelList[i]);
\r
887 }else if((groupPtr->channelList[i] >= 32) && (groupPtr->channelList[i] <=47)){
\r
888 groupChannelIdMask[1] |= (1 << (groupPtr->channelList[i] - 32));
\r
889 }else if((groupPtr->channelList[i] >= 64) && (groupPtr->channelList[i] <=95)){
\r
890 groupChannelIdMask[2] |= (1 << (groupPtr->channelList[i] - 64));
\r
894 /* Enable Normal conversion */
\r
895 ADC_0.NCMR[0].R = groupChannelIdMask[0];
\r
896 ADC_0.NCMR[1].R = groupChannelIdMask[1];
\r
897 ADC_0.NCMR[2].R = groupChannelIdMask[2];
\r
899 /* Enable Channel Interrupt */
\r
900 ADC_0.CIMR[0].R = groupChannelIdMask[0];
\r
901 ADC_0.CIMR[1].R = groupChannelIdMask[1];
\r
902 ADC_0.CIMR[2].R = groupChannelIdMask[2];
\r
904 /* Clear interrupts */
\r
905 ADC_0.ISR.B.ECH = 1;
\r
906 /* Enable ECH interrupt */
\r
907 ADC_0.IMR.B.MSKECH = 1;
\r
909 /* Trigger normal conversions for ADC0 */
\r
910 ADC_0.MCR.B.NSTART = 1;
\r
914 /* Error have been set within Adc_CheckStartGroupConversion(). */
\r
918 void Adc_StopGroupConversion (Adc_GroupType group)
\r
920 if (E_OK == Adc_CheckStopGroupConversion (group))
\r
922 /* Disable trigger normal conversions for ADC0 */
\r
923 ADC_0.MCR.B.NSTART = 0;
\r
925 /* Set group state to IDLE. */
\r
926 AdcConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
\r
928 /* Disable group notification if enabled. */
\r
929 if(1 == AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable){
\r
930 Adc_DisableGroupNotification (group);
\r
935 /* Error have been set within Adc_CheckStartGroupConversion(). */
\r
938 #endif /* endof #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON) */
\r
940 #else /* End of mpc5606s unique */
\r
942 void Adc_Group0ConversionComplete (void)
\r
944 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
945 EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
\r
946 Adc_GroupConversionComplete(0);
\r
948 void Adc_Group1ConversionComplete (void)
\r
950 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
951 EQADC.FISR[ADC_EQADC_QUEUE_1].B.EOQF = 1;
\r
952 Adc_GroupConversionComplete(1);
\r
954 void Adc_Group2ConversionComplete (void)
\r
956 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
957 EQADC.FISR[ADC_EQADC_QUEUE_2].B.EOQF = 1;
\r
958 Adc_GroupConversionComplete(2);
\r
960 void Adc_Group3ConversionComplete (void)
\r
962 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
963 EQADC.FISR[ADC_EQADC_QUEUE_3].B.EOQF = 1;
\r
964 Adc_GroupConversionComplete(3);
\r
966 void Adc_Group4ConversionComplete (void)
\r
968 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
969 EQADC.FISR[ADC_EQADC_QUEUE_4].B.EOQF = 1;
\r
970 Adc_GroupConversionComplete(4);
\r
972 void Adc_Group5ConversionComplete (void)
\r
974 /* ISR for FIFO 0 end of queue. Clear interrupt flag. */
\r
975 EQADC.FISR[ADC_EQADC_QUEUE_5].B.EOQF = 1;
\r
976 Adc_GroupConversionComplete(5);
\r
979 void Adc_EQADCError (void)
\r
981 /* Something is wrong!! Check the cause of the error and try to correct it. */
\r
982 if (EQADC.FISR[ADC_EQADC_QUEUE_0].B.TORF)
\r
984 /* Trigger overrun on queue 0!! */
\r
987 else if (EQADC.FISR[ADC_EQADC_QUEUE_1].B.TORF)
\r
989 /* Trigger overrun on queue 1!! */
\r
992 else if (EQADC.FISR[ADC_EQADC_QUEUE_0].B.CFUF)
\r
994 /* Command underflow on queue 0!! */
\r
997 else if (EQADC.FISR[ADC_EQADC_QUEUE_1].B.CFUF)
\r
999 /* Command underflow on queue 1!! */
\r
1002 else if (EQADC.FISR[ADC_EQADC_QUEUE_0].B.RFOF)
\r
1004 /* Result overflow on queue 0!! */
\r
1007 else if (EQADC.FISR[ADC_EQADC_QUEUE_1].B.RFOF)
\r
1009 /* Result overflow on queue 1!! */
\r
1014 /* Something else... TODO What have we missed above */
\r
1019 /* Helper macro to make sure that the qommand queue have
\r
1020 * executed the commands in the fifo.
\r
1021 * First check that the H/W negate the
\r
1022 * single scan bit and then wait for EOQ. */
\r
1023 #define WAIT_FOR_QUEUE_TO_FINISH(q) \
\r
1024 while (EQADC.FISR[q].B.SSS) \
\r
1029 while (!EQADC.FISR[q].B.EOQF) \
\r
1034 static void Adc_WriteEQADCRegister (Adc_EQADCRegisterType reg, Adc_EQADCRegister value)
\r
1036 Adc_RegisterWriteType writeReg;
\r
1037 uint32_t temp, oldMode;
\r
1041 /* Write command. */
\r
1042 writeReg.B.RW = 0;
\r
1043 writeReg.B.EOQ = 1;
\r
1044 writeReg.B.ADC_REG = value;
\r
1045 writeReg.B.ADC_REG_ADDR = reg;
\r
1047 /* Invalidate queue. */
\r
1048 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.CFINV = 1;
\r
1051 /* Write command through FIFO. */
\r
1052 EQADC.CFPR[ADC_EQADC_QUEUE_0].R = writeReg.R;
\r
1054 /* Enable FIFO. */
\r
1055 oldMode = EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE;
\r
1056 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
1057 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.SSE = 1;
\r
1059 /* Wait for command to be executed. */
\r
1060 WAIT_FOR_QUEUE_TO_FINISH(ADC_EQADC_QUEUE_0);
\r
1062 /* Flush result buffer. */
\r
1063 temp = EQADC.RFPR[ADC_EQADC_QUEUE_0].R;
\r
1064 EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
\r
1066 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = oldMode;
\r
1070 static Adc_EQADCRegister Adc_ReadEQADCRegister (Adc_EQADCRegisterType reg)
\r
1072 Adc_RegisterReadType readReg;
\r
1073 Adc_EQADCRegister result;
\r
1074 uint32_t oldMode, dmaRequestEnable;
\r
1078 /* Read command. */
\r
1080 readReg.B.EOQ = 1;
\r
1081 readReg.B.ADC_REG_ADDR = reg;
\r
1082 readReg.B.MESSAGE_TAG = ADC_EQADC_QUEUE_0;
\r
1084 /* Make sure that DMA requests for command fill and result drain is disabled. */
\r
1085 if (EQADC.IDCR[ADC_EQADC_QUEUE_0].B.RFDE || EQADC.IDCR[ADC_EQADC_QUEUE_0].B.CFFE)
\r
1087 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.CFFE = 0;
\r
1088 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.RFDE = 0;
\r
1090 /* Remember to enable requests again... */
\r
1091 dmaRequestEnable = TRUE;
\r
1095 dmaRequestEnable = FALSE;
\r
1098 /* Invalidate queue. */
\r
1099 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.CFINV = 1;
\r
1101 /* Write command through FIFO. */
\r
1102 EQADC.CFPR[ADC_EQADC_QUEUE_0].R = readReg.R;
\r
1104 /* Enable FIFO. */
\r
1105 oldMode = EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE;
\r
1106 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
1107 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.SSE = 1;
\r
1109 /* Wait for command to be executed. */
\r
1110 WAIT_FOR_QUEUE_TO_FINISH(ADC_EQADC_QUEUE_0);
\r
1112 /* Read result buffer. */
\r
1113 result = EQADC.RFPR[ADC_EQADC_QUEUE_0].R;
\r
1114 EQADC.FISR[ADC_EQADC_QUEUE_0].B.EOQF = 1;
\r
1116 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = oldMode;
\r
1118 if (dmaRequestEnable)
\r
1120 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.CFFE = 1;
\r
1121 EQADC.IDCR[ADC_EQADC_QUEUE_0].B.RFDE = 1;
\r
1129 static void Adc_ConfigureEQADC (const Adc_ConfigType *ConfigPtr)
\r
1131 Adc_GroupType group;
\r
1135 ADC_ENABLE = 0x8000,
\r
1137 /* Enable ADC0. */
\r
1138 Adc_WriteEQADCRegister (ADC0_CR, (ADC_ENABLE | ConfigPtr->hwConfigPtr->adcPrescale));
\r
1140 /* Disable time stamp timer. */
\r
1141 Adc_WriteEQADCRegister (ADC0_TSCR, 0);
\r
1143 for (group = ADC_GROUP0; group < ConfigPtr->nbrOfGroups; group++)
\r
1145 /* Enable eDMA requests for commands and results. */
\r
1146 EQADC.IDCR[group].B.CFFS = 1;
\r
1147 EQADC.IDCR[group].B.RFDS = 1;
\r
1149 /* Invalidate FIFO. */
\r
1150 EQADC.CFCR[group].B.CFINV = 1;
\r
1152 /* Enable FIFO fill requests. */
\r
1153 EQADC.IDCR[group].B.CFFE = 1;
\r
1154 EQADC.IDCR[group].B.RFDE = 1;
\r
1158 void Adc_ConfigureEQADCInterrupts (void)
\r
1160 Adc_GroupType group;
\r
1161 ISR_INSTALL_ISR2( "Adc_Err", Adc_EQADCError, EQADC_FISR_OVER, 2, 0);
\r
1162 for (group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
\r
1164 /* Enable end of queue, queue overflow/underflow interrupts. Clear corresponding flags. */
\r
1165 EQADC.FISR[group].B.RFOF = 1;
\r
1166 EQADC.IDCR[group].B.RFOIE = 1;
\r
1168 EQADC.FISR[group].B.CFUF = 1;
\r
1169 EQADC.IDCR[group].B.CFUIE = 1;
\r
1171 EQADC.FISR[group].B.TORF = 1;
\r
1172 EQADC.IDCR[group].B.TORIE = 1;
\r
1174 EQADC.FISR[group].B.EOQF = 1;
\r
1175 EQADC.IDCR[group].B.EOQIE = 1;
\r
1177 ISR_INSTALL_ISR2( "Adc_Grp0", Adc_Group0ConversionComplete, EQADC_FISR0_EOQF0, 2, 0);
\r
1178 }else if(group == 1){
\r
1179 ISR_INSTALL_ISR2( "Adc_Grp1", Adc_Group1ConversionComplete, EQADC_FISR1_EOQF1, 2, 0);
\r
1180 }else if(group == 2){
\r
1181 ISR_INSTALL_ISR2( "Adc_Grp2", Adc_Group2ConversionComplete, EQADC_FISR2_EOQF2, 2, 0);
\r
1182 }else if(group == 3){
\r
1183 ISR_INSTALL_ISR2( "Adc_Grp3", Adc_Group3ConversionComplete, EQADC_FISR3_EOQF3, 2, 0);
\r
1184 }else if(group == 4){
\r
1185 ISR_INSTALL_ISR2( "Adc_Grp4", Adc_Group4ConversionComplete, EQADC_FISR4_EOQF4, 2, 0);
\r
1186 }else if(group == 5){
\r
1187 ISR_INSTALL_ISR2( "Adc_Grp5", Adc_Group5ConversionComplete, EQADC_FISR5_EOQF5, 2, 0);
\r
1192 #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
\r
1193 void Adc_StartGroupConversion (Adc_GroupType group)
\r
1195 Adc_GroupDefType *groupPtr = (Adc_GroupDefType *)&AdcConfigPtr->groupConfigPtr[group];
\r
1197 /* Run development error check. */
\r
1198 if (E_OK == Adc_CheckStartGroupConversion (group))
\r
1200 /* Disable trigger. */
\r
1201 EQADC.CFCR[group].B.MODE = 0;
\r
1203 /* Set group state to BUSY. */
\r
1204 groupPtr->status->groupStatus = ADC_BUSY;
\r
1206 groupPtr->status->currSampleCount = 0;
\r
1207 groupPtr->status->currResultBufPtr = groupPtr->status->resultBufferPtr; /* Set current result buffer */
\r
1209 Dma_ConfigureDestinationAddress((uint32_t)groupPtr->status->resultBufferPtr, groupPtr->dmaResultChannel);
\r
1211 /* Always use single shot in streaming mode */
\r
1212 if( groupPtr->accessMode == ADC_ACCESS_MODE_STREAMING)
\r
1214 /* Set conversion mode. */
\r
1215 EQADC.CFCR[group].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
1216 /* Set single scan enable bit if this group is one shot. */
\r
1217 EQADC.CFCR[group].B.SSE = 1;
\r
1221 /* Set conversion mode. */
\r
1222 EQADC.CFCR[group].B.MODE = groupPtr->conversionMode;
\r
1223 /* Set single scan enable bit if this group is one shot. */
\r
1224 if (AdcConfigPtr->groupConfigPtr[group].conversionMode == ADC_CONV_MODE_ONESHOT)
\r
1226 EQADC.CFCR[group].B.SSE = 1;
\r
1232 /* Error have been set within Adc_CheckStartGroupConversion(). */
\r
1236 void Adc_StopGroupConversion (Adc_GroupType group)
\r
1238 if (E_OK == Adc_CheckStopGroupConversion (group))
\r
1240 uint32 groupMask = 0x3 << (group * 2);
\r
1241 /* Disable trigger normal conversions for ADC */
\r
1242 EQADC.CFCR[group].B.MODE = 0;
\r
1243 while((EQADC.CFSR.R & groupMask) != EQADC_CFIFO_STATUS_IDLE);
\r
1245 /* Invalidate FIFO. */
\r
1246 EQADC.CFCR[group].B.CFINV = 1;
\r
1248 /* Set group state to IDLE. */
\r
1249 AdcConfigPtr->groupConfigPtr[group].status->groupStatus = ADC_IDLE;
\r
1251 /* Disable group notification if enabled. */
\r
1252 if(1 == AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable){
\r
1253 Adc_DisableGroupNotification (group);
\r
1258 /* Error have been set within Adc_CheckStartGroupConversion(). */
\r
1263 static void Adc_EQADCCalibrationSequence (void)
\r
1265 Adc_ValueGroupType calibrationResult[sizeof(AdcCalibrationCommandQueue)/sizeof(AdcCalibrationCommandQueue[0])];
\r
1266 int32_t point25Average, point75Average, i;
\r
1267 Adc_EQADCRegister tempGCC, tempOCC;
\r
1270 IDEAL_RES25 = 0x1000,
\r
1271 IDEAL_RES75 = 0x3000,
\r
1274 /* Use group 0 DMA channel for calibration. */
\r
1275 Dma_ConfigureChannel ((Dma_TcdType *)&AdcCalibrationDMACommandConfig,DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1276 Dma_ConfigureChannelTranferSize (sizeof(AdcCalibrationCommandQueue)/sizeof(AdcCalibrationCommandQueue[0]),
\r
1277 DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1278 Dma_ConfigureChannelSourceCorr (-sizeof(AdcCalibrationCommandQueue), DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1280 Dma_ConfigureChannel ((Dma_TcdType *)&AdcCalibrationDMAResultConfig, DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1281 Dma_ConfigureChannelTranferSize (sizeof(calibrationResult)/sizeof(calibrationResult[0]),
\r
1282 DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1283 Dma_ConfigureChannelDestinationCorr (-sizeof(calibrationResult), DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1284 Dma_ConfigureDestinationAddress ((uint32_t)calibrationResult, DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1286 /* Invalidate queues. */
\r
1287 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.CFINV = 1;
\r
1289 Dma_StartChannel (DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1290 Dma_StartChannel (DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1292 /* Start conversion. */
\r
1293 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_ONESHOT;
\r
1294 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.SSE = 1;
\r
1296 /* Wait for conversion to complete. */
\r
1297 while(!Dma_ChannelDone (DMA_ADC_GROUP0_RESULT_CHANNEL))
\r
1302 /* Stop DMA channels and write calibration data to ADC engine. */
\r
1303 EQADC.CFCR[ADC_EQADC_QUEUE_0].B.MODE = ADC_CONV_MODE_DISABLED;
\r
1304 Dma_StopChannel (DMA_ADC_GROUP0_COMMAND_CHANNEL);
\r
1305 Dma_StopChannel (DMA_ADC_GROUP0_RESULT_CHANNEL);
\r
1307 /* Calculate conversion factors and write to ADC. */
\r
1308 point25Average = 0;
\r
1309 point75Average = 0;
\r
1310 for (i = 0; i < sizeof(calibrationResult)/sizeof(calibrationResult[0] / 2); i++)
\r
1312 point25Average += calibrationResult[i];
\r
1313 point75Average += calibrationResult[i + sizeof(calibrationResult)/sizeof(calibrationResult[0]) / 2];
\r
1316 /* Calculate average and correction slope and offset. */
\r
1317 point25Average /= (sizeof(calibrationResult)/sizeof(calibrationResult[0]) / 2);
\r
1318 point75Average /= (sizeof(calibrationResult)/sizeof(calibrationResult[0]) / 2);
\r
1320 tempGCC = ((IDEAL_RES75 - IDEAL_RES25) << 14) / (point75Average - point25Average);
\r
1321 tempOCC = IDEAL_RES75 - ((tempGCC * point75Average) >> 14) - 2;
\r
1323 /* GCC field is only 15 bits. */
\r
1324 tempGCC = tempGCC & ~(1 << 15);
\r
1326 /* OCC field is only 14 bits. */
\r
1327 tempOCC = tempOCC & ~(3 << 14);
\r
1329 /* Write calibration data to ADC engine. */
\r
1330 Adc_WriteEQADCRegister (ADC0_GCCR, tempGCC);
\r
1331 Adc_WriteEQADCRegister (ADC0_OCCR, tempOCC);
\r
1333 /* Read back and check calibration values. */
\r
1334 if (Adc_ReadEQADCRegister (ADC0_GCCR) != tempGCC)
\r
1338 else if (Adc_ReadEQADCRegister (ADC0_OCCR) != tempOCC)
\r
1345 #define SYSTEM_CLOCK_DIVIDE(f) ((f / 2) - 1)
\r
1347 #if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
\r
1348 void Adc_EnableGroupNotification (Adc_GroupType group)
\r
1350 Std_ReturnType res;
\r
1352 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1353 if( (ValidateInit(ADC_ENABLEGROUPNOTIFICATION_ID) == E_NOT_OK) ||
\r
1354 (ValidateGroup(group, ADC_ENABLEGROUPNOTIFICATION_ID) == E_NOT_OK))
\r
1358 else if (AdcConfigPtr->groupConfigPtr[group].groupCallback == NULL)
\r
1361 Det_ReportError(MODULE_ID_ADC,0,ADC_ENABLEGROUPNOTIFICATION_ID ,ADC_E_NOTIF_CAPABILITY );
\r
1365 /* Nothing strange. Go on... */
\r
1372 AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable = 1;
\r
1376 void Adc_DisableGroupNotification (Adc_GroupType group)
\r
1378 Std_ReturnType res;
\r
1380 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1381 if( (ValidateInit(ADC_DISABLEGROUPNOTIFICATION_ID) == E_NOT_OK) ||
\r
1382 (ValidateGroup(group, ADC_DISABLEGROUPNOTIFICATION_ID) == E_NOT_OK))
\r
1386 else if (AdcConfigPtr->groupConfigPtr[group].groupCallback == NULL)
\r
1389 Det_ReportError(MODULE_ID_ADC,0,ADC_DISABLEGROUPNOTIFICATION_ID ,ADC_E_NOTIF_CAPABILITY );
\r
1393 /* Nothing strange. Go on... */
\r
1400 AdcConfigPtr->groupConfigPtr[group].status->notifictionEnable = 0;
\r
1407 /* Development error checking functions. */
\r
1408 #if (ADC_READ_GROUP_API == STD_ON)
\r
1409 static Std_ReturnType Adc_CheckReadGroup (Adc_GroupType group)
\r
1411 Std_ReturnType returnValue = E_OK;
\r
1413 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1415 if( (ValidateInit(ADC_READGROUP_ID) == E_NOT_OK) ||
\r
1416 (ValidateGroup(group, ADC_READGROUP_ID) == E_NOT_OK))
\r
1418 returnValue = E_NOT_OK;
\r
1420 else if (ADC_IDLE == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)
\r
1423 returnValue = E_NOT_OK;
\r
1424 Det_ReportError(MODULE_ID_ADC,0,ADC_READGROUP_ID ,ADC_E_IDLE );
\r
1428 /* Nothing strange. Go on... */
\r
1429 returnValue = E_OK;
\r
1432 return (returnValue);
\r
1436 #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
\r
1437 static Std_ReturnType Adc_CheckStartGroupConversion (Adc_GroupType group)
\r
1439 Std_ReturnType returnValue = E_OK;
\r
1441 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1443 if( (ValidateInit(ADC_STARTGROUPCONVERSION_ID) == E_NOT_OK) ||
\r
1444 (ValidateGroup(group, ADC_STARTGROUPCONVERSION_ID) == E_NOT_OK))
\r
1446 returnValue = E_NOT_OK;
\r
1448 else if ( NULL == AdcConfigPtr->groupConfigPtr[group].status->resultBufferPtr )
\r
1450 /* ResultBuffer not set, ADC424 */
\r
1451 Det_ReportError(MODULE_ID_ADC,0,ADC_STARTGROUPCONVERSION_ID, ADC_E_BUFFER_UNINIT );
\r
1452 returnValue = E_NOT_OK;
\r
1454 else if (!(ADC_TRIGG_SRC_SW == AdcConfigPtr->groupConfigPtr[group].triggerSrc))
\r
1456 /* Wrong trig source, ADC133. */
\r
1457 Det_ReportError(MODULE_ID_ADC,0,ADC_STARTGROUPCONVERSION_ID, ADC_E_WRONG_TRIGG_SRC);
\r
1458 returnValue = E_NOT_OK;
\r
1460 else if (!((ADC_IDLE == AdcConfigPtr->groupConfigPtr[group].status->groupStatus) ||
\r
1461 (ADC_STREAM_COMPLETED == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)))
\r
1463 /* Group status not OK, ADC351, ADC428 */
\r
1464 Det_ReportError(MODULE_ID_ADC,0,ADC_STARTGROUPCONVERSION_ID, ADC_E_BUSY );
\r
1466 //returnValue = E_NOT_OK;
\r
1467 returnValue = E_OK;
\r
1471 returnValue = E_OK;
\r
1475 return (returnValue);
\r
1478 static Std_ReturnType Adc_CheckStopGroupConversion (Adc_GroupType group)
\r
1480 Std_ReturnType returnValue = E_OK;
\r
1482 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1483 if( (ValidateInit(ADC_STOPGROUPCONVERSION_ID) == E_NOT_OK) ||
\r
1484 (ValidateGroup(group, ADC_STOPGROUPCONVERSION_ID) == E_NOT_OK))
\r
1486 returnValue = E_NOT_OK;
\r
1488 else if (!(ADC_TRIGG_SRC_SW == AdcConfigPtr->groupConfigPtr[group].triggerSrc))
\r
1490 /* Wrong trig source, ADC164. */
\r
1491 Det_ReportError(MODULE_ID_ADC,0,ADC_STOPGROUPCONVERSION_ID, ADC_E_WRONG_TRIGG_SRC);
\r
1492 returnValue = E_NOT_OK;
\r
1494 else if (ADC_IDLE == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)
\r
1496 /* Group status not OK, ADC241 */
\r
1497 Det_ReportError(MODULE_ID_ADC,0,ADC_STOPGROUPCONVERSION_ID, ADC_E_IDLE );
\r
1498 returnValue = E_NOT_OK;
\r
1502 returnValue = E_OK;
\r
1506 return (returnValue);
\r
1510 static Std_ReturnType Adc_CheckInit (const Adc_ConfigType *ConfigPtr)
\r
1512 Std_ReturnType returnValue = E_OK;
\r
1514 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1515 if (!(ADC_UNINIT == adcState))
\r
1517 /* Oops, already initialised. */
\r
1518 Det_ReportError(MODULE_ID_ADC,0,ADC_INIT_ID, ADC_E_ALREADY_INITIALIZED );
\r
1519 returnValue = E_NOT_OK;
\r
1521 else if (ConfigPtr == NULL)
\r
1523 /* Wrong config! */
\r
1524 Det_ReportError(MODULE_ID_ADC,0,ADC_INIT_ID, ADC_E_PARAM_CONFIG );
\r
1525 returnValue = E_NOT_OK;
\r
1529 /* Looks good!! */
\r
1530 returnValue = E_OK;
\r
1533 return (returnValue);
\r
1536 #if (ADC_DEINIT_API == STD_ON)
\r
1537 static Std_ReturnType Adc_CheckDeInit (void)
\r
1539 Std_ReturnType returnValue = E_OK;
\r
1541 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1542 if(ValidateInit(ADC_DEINIT_ID) == E_OK)
\r
1544 for (Adc_GroupType group = ADC_GROUP0; group < AdcConfigPtr->nbrOfGroups; group++)
\r
1546 /* Check ADC is IDLE or COMPLETE*/
\r
1547 if((AdcConfigPtr->groupConfigPtr[group].status->groupStatus != ADC_IDLE) && (AdcConfigPtr->groupConfigPtr[group].status->groupStatus != ADC_STREAM_COMPLETED))
\r
1549 Det_ReportError(MODULE_ID_ADC,0,ADC_DEINIT_ID, ADC_E_BUSY );
\r
1550 returnValue = E_NOT_OK;
\r
1556 returnValue = E_NOT_OK;
\r
1559 return (returnValue);
\r
1563 static Std_ReturnType Adc_CheckSetupResultBuffer (Adc_GroupType group)
\r
1565 Std_ReturnType returnValue = E_OK;
\r
1567 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1568 if(ValidateGroup(group, ADC_SETUPRESULTBUFFER_ID) == E_NOT_OK)
\r
1570 returnValue = E_NOT_OK;
\r
1573 return (returnValue);
\r
1576 static Std_ReturnType Adc_CheckGetStreamLastPointer (Adc_GroupType group)
\r
1578 Std_ReturnType returnValue = E_OK;
\r
1580 #if ( ADC_DEV_ERROR_DETECT == STD_ON )
\r
1581 if( (ValidateInit(ADC_GETSTREAMLASTPOINTER_ID) == E_NOT_OK) ||
\r
1582 (ValidateGroup(group, ADC_GETSTREAMLASTPOINTER_ID) == E_NOT_OK))
\r
1584 returnValue = E_NOT_OK;
\r
1586 else if(AdcConfigPtr->groupConfigPtr[group].status->groupStatus == ADC_IDLE)
\r
1587 { /** @req ADC215 Check ADC is not in IDLE */
\r
1588 Det_ReportError(MODULE_ID_ADC,0,ADC_GETSTREAMLASTPOINTER_ID, ADC_E_IDLE );
\r
1589 returnValue = E_NOT_OK;
\r
1592 return (returnValue);
\r